Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 364  2011-2013 Microchip Technology Inc.
REGISTER 25-3: CM4CON: COMPARATOR 4 CONTROL REGISTER
R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0
CON COE CPOL
— — —CEVTCOUT
bit 15 bit 8
R/W-0 R/W-0 U-0 R/W-0 U-0 U-0 R/W-0 R/W-0
EVPOL1 EVPOL0
—CREF
(1)
— — CCH1
(1)
CCH0
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CON: Comparator Enable bit
1 = Comparator is enabled
0 = Comparator is disabled
bit 14 COE: Comparator Output Enable bit
1 = Comparator output is present on the CxOUT pin
0 = Comparator output is internal only
bit 13 CPOL: Comparator Output Polarity Select bit
1 = Comparator output is inverted
0 = Comparator output is not inverted
bit 12-10 Unimplemented: Read as ‘0’
bit 9 CEVT: Comparator Event bit
1 = Comparator event according to EVPOL<1:0> settings occurred; disables future triggers and
interrupts until the bit is cleared
0 = Comparator event did not occur
bit 8 COUT: Comparator Output bit
When CPOL =
0 (non-inverted polarity):
1 = VIN+ > VIN-
0 = V
IN+ < VIN-
When CPOL =
1 (inverted polarity):
1 = VIN+ < VIN-
0 = V
IN+ > VIN-
bit 7-6 EVPOL<1:0>: Trigger/Event/Interrupt Polarity Select bits
11 = Trigger/event/interrupt generated on any change of the comparator output (while CEVT = 0)
10 = Trigger/event/interrupt generated only on high-to-low transition of the polarity selected comparator
output (while CEVT = 0)
If CPOL =
1 (inverted polarity):
Low-to-high transition of the comparator output.
If CPOL =
0 (non-inverted polarity):
High-to-low transition of the comparator output.
01 = Trigger/event/interrupt generated only on low-to-high transition of the polarity selected comparator
output (while CEVT = 0)
If CPOL =
1 (inverted polarity):
High-to-low transition of the comparator output.
If CPOL =
0 (non-inverted polarity):
Low-to-high transition of the comparator output.
00 = Trigger/event/interrupt generation is disabled
Note 1: Inputs that are selected and not available will be tied to V
SS. See the “Pin Diagrams” section for available
inputs for each package.