Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 334  2011-2013 Microchip Technology Inc.
bit 4-0 CH0SA<4:0>: Channel 0 Positive Input Select for Sample MUXA bits
(1)
11111 = Open; use this selection with CTMU capacitive and time measurement
11110 = Channel 0 positive input is connected to the CTMU temperature measurement diode (CTMU TEMP)
11101 = Reserved
11100 = Reserved
11011 = Reserved
11010 = Channel 0 positive input is the output of OA3/AN6
(2,3)
11001 = Channel 0 positive input is the output of OA2/AN0
(2)
11000 = Channel 0 positive input is the output of OA1/AN3
(2)
10110 = Reserved
•
•
•
10000 = Reserved
01111 = Channel 0 positive input is AN15
(1,3)
01110 = Channel 0 positive input is AN14
(1,3)
01101 = Channel 0 positive input is AN13
(1,3)
•
•
•
00010 = Channel 0 positive input is AN2
(1,3)
00001 = Channel 0 positive input is AN1
(1,3)
00000 = Channel 0 positive input is AN0
(1,3)
REGISTER 23-6: AD1CHS0: ADC1 INPUT CHANNEL 0 SELECT REGISTER (CONTINUED)
Note 1: AN0 through AN7 are repurposed when comparator and op amp functionality is enabled. See Figure 23-1
to determine how enabling a particular op amp or comparator affects selection choices for Channels 1, 2
and 3.
2: The OAx input is used if the corresponding op amp is selected (OPMODE (CMxCON<10>) = 1);
otherwise, the ANx input is used.
3: See the “Pin Diagrams” section for the available analog channels for each device.