Datasheet

 2011-2013 Microchip Technology Inc. DS70000657H-page 329
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 23-3: AD1CON3: ADC1 CONTROL REGISTER 3
R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADRC — — SAMC4
(1)
SAMC3
(1)
SAMC2
(1)
SAMC1
(1)
SAMC0
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADCS7
(2)
ADCS6
(2)
ADCS5
(2)
ADCS4
(2)
ADCS3
(2)
ADCS2
(2)
ADCS1
(2)
ADCS0
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 ADRC: ADC1 Conversion Clock Source bit
1 = ADC internal RC clock
0 = Clock derived from system clock
bit 14-13 Unimplemented: Read as ‘0’
bit 12-8 SAMC<4:0>: Auto-Sample Time bits
(1)
11111 = 31 TAD
•
•
•
00001 = 1 T
AD
00000 = 0 TAD
bit 7-0 ADCS<7:0>: ADC1 Conversion Clock Select bits
(2)
11111111 = TP • (ADCS<7:0> + 1) = TP •256 = TAD
•
•
•
00000010 = T
P • (ADCS<7:0> + 1) = TP •3 = TAD
00000001 = T
P • (ADCS<7:0> + 1) = TP •2 = TAD
00000000 = TP • (ADCS<7:0> + 1) = TP •1 = TAD
Note 1: This bit is only used if SSRC<2:0> (AD1CON1<7:5>) = 111 and SSRCG (AD1CON1<4>) = 0.
2: This bit is not used if ADRC (AD1CON3<15>) = 1.