Datasheet
2011-2013 Microchip Technology Inc. DS70000657H-page 327
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 23-2: AD1CON2: ADC1 CONTROL REGISTER 2
R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0
VCFG2 VCFG1 VCFG0
— — CSCNA CHPS1 CHPS0
bit 15 bit 8
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BUFS SMPI4 SMPI3 SMPI2 SMPI1 SMPI0 BUFM ALTS
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-13 VCFG<2:0>: Converter Voltage Reference Configuration bits
bit 12-11 Unimplemented: Read as ‘0’
bit 10 CSCNA: Input Scan Select bit
1 = Scans inputs for CH0+ during Sample MUXA
0 = Does not scan inputs
bit 9-8 CHPS<1:0>: Channel Select bits
In 12-bit mode (AD21B =
1), the CHPS<1:0> bits are Unimplemented and are Read as ‘0’:
1x = Converts CH0, CH1, CH2 and CH3
01 = Converts CH0 and CH1
00 = Converts CH0
bit 7 BUFS: Buffer Fill Status bit (only valid when BUFM = 1)
1 = ADC is currently filling the second half of the buffer; the user application should access data in the
first half of the buffer
0 = ADC is currently filling the first half of the buffer; the user application should access data in the
second half of the buffer
bit 6-2 SMPI<4:0>: Increment Rate bits
When ADDMAEN =
0:
x1111 = Generates interrupt after completion of every 16th sample/conversion operation
x1110 = Generates interrupt after completion of every 15th sample/conversion operation
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•
•
x0001 = Generates interrupt after completion of every 2nd sample/conversion operation
x0000 = Generates interrupt after completion of every sample/conversion operation
When ADDMAEN =
1:
11111 = Increments the DMA address after completion of every 32nd sample/conversion operation
11110 = Increments the DMA address after completion of every 31st sample/conversion operation
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•
•
00001 = Increments the DMA address after completion of every 2nd sample/conversion operation
00000 = Increments the DMA address after completion of every sample/conversion operation
Value VREFH VREFL
000 AVDD Avss
001 External V
REF+Avss
010 A
VDD External VREF-
011 External VREF+ External VREF-
1xx A
VDD AVSS