Datasheet

2011-2013 Microchip Technology Inc. DS70000657H-page 299
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 21-10: CxCFG2: ECANx BAUD RATE CONFIGURATION REGISTER 2
U-0 R/W-x U-0 U-0 U-0 R/W-x R/W-x R/W-x
WAKFIL SEG2PH2 SEG2PH1 SEG2PH0
bit 15 bit 8
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
SEG2PHTS SAM SEG1PH2 SEG1PH1 SEG1PH0 PRSEG2 PRSEG1 PRSEG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0
bit 14 WAKFIL: Select CAN Bus Line Filter for Wake-up bit
1 = Uses CAN bus line filter for wake-up
0 = CAN bus line filter is not used for wake-up
bit 13-11 Unimplemented: Read as ‘0
bit 10-8 SEG2PH<2:0>: Phase Segment 2 bits
111 = Length is 8 x T
Q
000 = Length is 1 x T
Q
bit 7 SEG2PHTS: Phase Segment 2 Time Select bit
1 = Freely programmable
0 = Maximum of SEG1PHx bits or Information Processing Time (IPT), whichever is greater
bit 6 SAM: Sample of the CAN Bus Line bit
1 = Bus line is sampled three times at the sample point
0 = Bus line is sampled once at the sample point
bit 5-3 SEG1PH<2:0>: Phase Segment 1 bits
111 = Length is 8 x T
Q
000 = Length is 1 x T
Q
bit 2-0 PRSEG<2:0>: Propagation Time Segment bits
111 = Length is 8 x TQ
000 = Length is 1 x T
Q