Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 170 2011-2013 Microchip Technology Inc.
REGISTER 10-5: PMD6: PERIPHERAL MODULE DISABLE CONTROL REGISTER 6
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
—PWM3MD
(1)
PWM2MD
(1)
PWM1MD
(1)
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as0
bit 10 PWM3MD: PWM3 Module Disable bit
(1)
1 = PWM3 module is disabled
0 = PWM3 module is enabled
bit 9 PWM2MD: PWM2 Module Disable bit
(1)
1 = PWM2 module is disabled
0 = PWM2 module is enabled
bit 8 PWM1MD: PWM1 Module Disable bit
(1)
1 = PWM1 module is disabled
0 = PWM1 module is enabled
bit 7-0 Unimplemented: Read as ‘0
Note 1: This bit is available on dsPIC33EPXXXMC50X/20X and PIC24EPXXXMC20X devices only.