Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 16  2011-2013 Microchip Technology Inc.
Pin Diagrams (Continued)
48-Pin UQFN
(1,2,3)
= Pins are up to 5V tolerant
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select (PPS)” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See Section 11.0 “I/O
Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
4: There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the
JTAGEN bit field in Table 27-2.
48 47 46 45 43 42 41 40 39 38
13 14 15 16 17 18 19 21 22 23
3
33
31
30
29
28
27
26
25
4
5
7
9
10
11
12
1
2
35
34
6
24
36
37
PIC24EPXXXGP204
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS
/BCLK1/RC2
V
DD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 V
DD
VSS SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CV
REF2O/SDO1/RP20/T1CK/RA4
RPI45/CTPLS/RB13
RPI44/RB12
RP43/RB11
RP42/RB10
V
CAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
(4)
TDO/RA10
TDI/RA7
RPI46/T3CK/RB14 RPI47/T5CK/RB15
AV
SS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF+/AN3/OA1OUT/RPI33/CTED1/RB1
dsPIC33EPXXXGP504
8
N/C
20
N/C
32
N/C
44
N/C