Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70657G-page 72 2011-2013 Microchip Technology Inc.
IPC23 086E PWM2IP<2:0> PWM1IP<2:0>
4400
IPC24 0870 PWM3IP<2:0>
0004
IPC35 0886 JTAGIP<2:0> ICDIP<2:0>
4400
IPC36 0888 PTG0IP<2:0> PTGWDTIP<2:0> PTGSTEPIP<2:0>
4440
IPC37 088A PTG3IP<2:0> PTG2IP<2:0> —PTG1IP<2:0>
0444
INTCON1 08C0 NSTDIS OVAERR OVBERR COVAERR COVBERR OVATE OVBTE COVTE SFTACERR DIV0ERR DMACERR MATHERR ADDRERR STKERR OSCFAIL
0000
INTCON2 08C2 GIE DISI SWTRAP INT2EP INT1EP INT0EP
8000
INTCON3 08C4 DAE DOOVR
0000
INTCON4 08C6 —SGHT
0000
INTTREG 08C8 ILR<3:0> VECNUM<7:0>
0000
TABLE 4-7: INTERRUPT CONTROLLER REGISTER MAP FOR dsPIC33EPXXXMC50X DEVICES ONLY (CONTINUED)
File
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend:
— = unimplemented, read as ‘
0
’. Reset values are shown in hexadecimal.