Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 7
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
28-Pin QFN-S
(1,2,3)
= Pins are up to 5V tolerant
28 27 26 25 24 23 22
8 9 10 11 12 13 14
3
18
17
16
15
4
5
7
1
2 20
19
6
21
PIC24EPXXXMC202
dsPIC33EPXXXMC202/502
TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
SCK1/RP39/INT0/RB7
PGEC2/ASCL2/RP38/RB6
PGED2/ASDA2/RP37/RB5
V
DD
CVREF2O/RP20/T1CK/RA4
FLT32/RP36/RB4
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
V
CAP
VSS
TMS/ASDA1/SDI1/RP41/RB9
RPI46/PWM1H/T3CK/RB14 RPI47/PWM1L/T5CK/RB15
AV
SS
AVDD MCLR AN0/OA2OUT/RA0 AN1/C2IN1+/RA1
PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF+/AN3/OA1OUT/RPI33/CTED1/RB1
V
SS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O
Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.