Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70657G-page 336  2011-2013 Microchip Technology Inc.
FIGURE 24-1: PTG BLOCK DIAGRAM
16-Bit Data Bus
PTGQPTR<4:0>
Command
Decoder
PTGHOLD
PTGADJ
PTG Watchdog
Timer
(1)
PTG Control Logic
PTGWDTIF
PTG General
Purpose
Timerx
PTG Loop
Counter x
Clock Inputs
FP
TAD
T1CLK
T2CLK
T3CLK
PTGCLK<2:0>
PTGL0<15:0> PTGTxLIM<15:0> PTGCxLIM<15:0>
PTGBTE<15:0>
PTGO0
PTGSDLIM<15:0>
PTG Step
Delay Timer
PWM
OC1
OC2
IC1
CMPx
ADC
INT2
PTGCON<15:0>
PTG Interrupts Trigger Outputs
AD1CHS0<15:0>
Step Command
Step Command
PTGSTEPIF
Trigger Inputs
PTGO31
•
•
•
PTG0IF
PTG3IF
•
•
•
Step Command
Step Command
F
OSC

PTGDIV<4:0>
PTGCST<15:0>
Note 1: This is a dedicated Watchdog Timer for the PTG module and is independent of the device Watchdog Timer.
PTGQUE0
PTGQUE1
PTGQUE2
PTGQUE3
PTGQUE5
PTGQUE4
PTGQUE6
PTGQUE7