Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 303
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 21-19: CxFMSKSEL2: ECAN x FILTER 15-8 MASK SELECTION REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
F15MSK<1:0> F14MSK<1:0> F13MSK<1:0> F12MSK<1:0>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
F11MSK<1:0> F10MSK<1:0> F9MSK<1:0> F8MSK<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 F15MSK<1:0>: Mask Source for Filter 15 bits
11 = Reserved
10 = Acceptance Mask 2 registers contain mask
01 = Acceptance Mask 1 registers contain mask
00 = Acceptance Mask 0 registers contain mask
bit 13-12 F14MSK<1:0>: Mask Source for Filter 14 bits (same values as bits<15:14>)
bit 11-10 F13MSK<1:0>: Mask Source for Filter 13 bits (same values as bits<15:14>)
bit 9-8 F12MSK<1:0>: Mask Source for Filter 12 bits (same values as bits<15:14>)
bit 7-6 F11MSK<1:0>: Mask Source for Filter 11 bits (same values as bits<15:14>)
bit 5-4 F10MSK<1:0>: Mask Source for Filter 10 bits (same values as bits<15:14>)
bit 3-2 F9MSK<1:0>: Mask Source for Filter 9 bits (same values as bits<15:14>)
bit 1-0 F8MSK<1:0>: Mask Source for Filter 8 bits (same values as bits<15:14>)