Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 187
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
REGISTER 11-8: RPINR14: PERIPHERAL PIN SELECT INPUT REGISTER 14
(dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X DEVICES ONLY)
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— QEB1R<6:0>
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
— QEA1R<6:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-8 QEB1R<6:0>: Assign B (QEB) to the Corresponding RPn Pin bits
(see Table 11-2 for input pin selection numbers)
1111001 = Input tied to RPI121
.
.
.
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS
bit 7 Unimplemented: Read as ‘0’
bit 6-0 QEA1R<6:0>: Assign A (QEA) to the Corresponding RPn Pin bits
(see Table 11-2 for input pin selection numbers)
1111001 = Input tied to RPI121
.
.
.
0000001 = Input tied to CMP1
0000000 = Input tied to V
SS