Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70657G-page 118  2011-2013 Microchip Technology Inc.
5.2 RTSP Operation
RTSP allows the user application to erase a single
page of memory and to program two instruction words
at a time. See the General Purpose and Motor Control
Family tables (Table 1 and Tabl e 2 , respectively) for the
page sizes of each device.
For more information on erasing and programming
Flash memory, refer to Section 5. “Flash Program-
ming” (DS70609) in the “dsPIC33E/PIC24E Family
Reference Manual”.
5.3 Programming Operations
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode. The processor stalls (waits) until the programming
operation is finished.
For erase and program times, refer to Parameters D137a
and D137b (Page Erase Time), and D138a and
D138b (Word Write Cycle Time) in Table 30-14 in
Section 30.0 “Electrical Characteristics”.
Setting the WR bit (NVMCON<15>) starts the opera-
tion and the WR bit is automatically cleared when the
operation is finished.
5.3.1 PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
Programmers can program two adjacent words
(24 bits x 2) of program Flash memory at a time on
every other word address boundary (0x000002,
0x000006, 0x00000A, etc.). To do this, it is necessary
to erase the page that contains the desired address of
the location the user wants to change.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
application must wait for the programming time until
programming is complete. The two instructions follow-
ing the start of the programming sequence should be
NOPs.
Refer to Section 5. “Flash Programming” (DS70609)
in the “dsPIC33E/PIC24E Family Reference Manual”
for details and codes examples on programming using
RTSP.
5.4 Flash Memory Resources
Many useful resources are provided on the main prod-
uct page of the Microchip web site for the devices listed
in this data sheet. This product page, which can be
accessed using this link, contains the latest updates
and additional information.
5.4.1 KEY RESOURCES
• Section 5. “Flash Programming” (DS70609)
• Code Samples
• Application Notes
• Software Libraries
• Webinars
• All Related “dsPIC33E/PIC24E Family Reference
Manual” Sections
• Development Tools
5.5 Control Registers
Four SFRs are used to read and write the program
Flash memory: NVMCON, NVMKEY, NVMADRU and
NVMADR.
The NVMCON register (Register 5-1) controls which
blocks are to be erased, which memory type is to be
programmed and the start of the programming cycle.
NVMKEY (Register 5-4) is a write-only register that is
used for write protection. To start a programming or
erase sequence, the user application must
consecutively write 0x55 and 0xAA to the NVMKEY
register.
There are two NVM Address registers: NVMADRU and
NVMADR. These two registers, when concatenated,
form the 24-bit Effective Address (EA) of the selected
word for programming operations or the selected page
for erase operations.
The NVMADRU register is used to hold the upper 8 bits
of the EA, while the NVMADR register is used to hold
the lower 16 bits of the EA.
Note: In the event you are not able to access the
product page using the link above, enter
this URL in your browser:
http://www.microchip.com/wwwproducts/
Devices.aspx?dDocName=en555464