Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 81

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X

TABLE 4-19: SPI1 AND SPI2 REGISTER MAP

SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

All

Resets

SPI1STAT 0240 SPIEN

— SPISIDL — — SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF 0000

SPI1CON1 0242

— — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0> 0000

SPI1CON2 0244 FRMEN SPIFSD FRMPOL

— — — — — — — — — — — FRMDLY SPIBEN 0000

SPI1BUF 0248 SPI1 Transmit and Receive Buffer Register 0000

SPI2STAT 0260 SPIEN

— SPISIDL — — SPIBEC<2:0> SRMPT SPIROV SRXMPT SISEL<2:0> SPITBF SPIRBF 0000

SPI2CON1 0262

— — — DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0> 0000

SPI2CON2 0264 FRMEN SPIFSD FRMPOL

— — — — — — — — — — — FRMDLY SPIBEN 0000

SPI2BUF 0268 SPI2 Transmit and Receive Buffer Register 0000

Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.