Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 513
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
INDEX
A
Absolute Maximum Ratings .............................................. 399
AC Characteristics .................................................... 411, 469
ADC Module.............................................................. 457
ADC Module (10-Bit Mode)............................... 459, 471
ADC Module (12-Bit Mode)............................... 458, 471
Capacitive Loading Requirements on
Output Pins ....................................................... 411
Internal FRC Accuracy.............................................. 413
Internal LPRC Accuracy............................................ 413
Load Conditions ................................................ 411, 469
Op Amp/Comparator Voltage Reference
Settling Time Specifications.............................. 455
SPI1 Maximum Data/Clock Rate Summary .............. 436
SPI2 Maximum Data Clock Rate Summary .............. 424
ADC
Control Registers ...................................................... 323
Helpful Tips ............................................................... 322
Key Features............................................................. 319
Resources................................................................. 322
Arithmetic Logic Unit (ALU)................................................. 42
Assembler
MPASM Assembler................................................... 396
B
Bit-Reversed Addressing .................................................. 113
Example.................................................................... 114
Implementation ......................................................... 113
Sequence Table (16-Entry)....................................... 114
Block Diagrams
16-Bit Timer1 Module................................................ 201
ADC Conversion Clock Period.................................. 321
ADC with Connection Options for ANx Pins
and Op Amps.................................................... 320
Arbiter Architecture ................................................... 108
Comparator (Module 4)............................................. 354
Connections for On-Chip Voltage Regulator............. 382
CPU Core.................................................................... 34
CRC Module ............................................................. 371
CRC Shift Engine...................................................... 372
CTMU Module........................................................... 314
Digital Filter Interconnect .......................................... 355
DMA Controller ......................................................... 139
DMA Module ............................................................. 137
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X
and PIC24EPXXXGP/MC20X............................. 23
ECAN Module ........................................................... 286
High-Speed PWMx Architectural Overview .............. 225
High-Speed PWMx Register Interconnection ........... 226
I2Cx Module.............................................................. 272
Input Capture x ......................................................... 211
Multiplexing Remappable Output for RPn................. 178
Op Amp Configuration A........................................... 356
Op Amp Configuration B........................................... 357
Op Amp/Comparator (Modules 1, 2, 3)..................... 353
Op Amp/Comparator Voltage Reference Module ..... 354
Oscillator System...................................................... 151
Output Compare x Module........................................ 217
PLL............................................................................ 152
PTG Module.............................................................. 336
Quadrature Encoder Interface .................................. 248
Remappable Input for U1RX..................................... 174
Reset System............................................................ 121
Shared Port Structure............................................... 171
SPIx Module ............................................................. 264
Type B Timer (Timer2 and Timer4) .......................... 206
Type B/Type C Timer Pair (32-Bit Timer) ................. 207
Type C Timer (Timer3 and Timer5) .......................... 206
UARTx Module ......................................................... 279
User-Programmable Blanking Function.................... 355
Watchdog Timer (WDT)............................................ 383
Brown-out Reset (BOR).................................................... 382
C
C Compilers
MPLAB C18.............................................................. 396
Charge Time Measurement Unit. See CTMU.
Code Examples
IC1 Connection to QEI1 Input on Pin 43
of dsPIC33EPXXXMC206 ................................ 174
Port Write/Read ........................................................ 172
PWMx Write-Protected Register
Unlock Sequence ............................................. 224
PWRSAV Instruction Syntax .................................... 161
Code Protection........................................................ 377, 384
CodeGuard Security ................................................. 377, 384
Configuration Bits ............................................................. 377
Description................................................................ 379
Configuration Byte Register Map...................................... 378
Configuring Analog and Digital Port Pins.......................... 172
CPU
Clocking System Options ......................................... 152
Fast RC (FRC) Oscillator.................................. 152
FRC Oscillator with PLL ................................... 152
FRC Oscillator with Postscaler......................... 152
Low-Power RC (LPRC) Oscillator .................... 152
Primary (XT, HS, EC) Oscillator ....................... 152
Primary Oscillator with PLL .............................. 152
Control Register.......................................................... 38
Control Registers........................................................ 38
Resources .................................................................. 37
CTMU
Control Registers...................................................... 315
Resources ................................................................ 314
Customer Change Notification Service............................. 520
Customer Notification Service .......................................... 520
Customer Support............................................................. 520
D
Data Address Space........................................................... 49
Memory Map for dsPIC33EP128MC20X/50X,
dsPIC33EP128GP50X Devices.......................... 52
Memory Map for dsPIC33EP256MC20X/50X,
dsPIC33EP256GP50X Devices.......................... 53
Memory Map for dsPIC33EP32MC20X/50X,
dsPIC33EP32GP50X Devices............................ 50
Memory Map for dsPIC33EP512MC20X/50X,
dsPIC33EP512GP50X Devices.......................... 54
Memory Map for dsPIC33EP64MC20X/50X,
dsPIC33EP64GP50X Devices............................ 51
Memory Map for PIC24EP128GP/MC20X/50X
Devices............................................................... 57
Memory Map for PIC24EP256GP/MC20X/50X
Devices............................................................... 58
Memory Map for PIC24EP32GP/MC20X/50X
Devices............................................................... 55