Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70657G-page 356  2011-2013 Microchip Technology Inc.
25.1 Op Amp Application
Considerations
There are two configurations to take into consider-
ation when designing with the op amp modules that
are available in the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and PIC24EPXXXGP/
MC20X devices. Configuration A (see Figure 25-6)
takes advantage of the internal connection to the ADC
module to route the output of the op amp directly to the
ADC for measurement. Configuration B (see
Figure 25-7) requires that the designer externally route
the output of the op amp (OAxOUT) to a separate ana-
log input pin (ANy) on the device. Table 30-55 in
Section 30.0 “Electrical Characteristics” describes
the performance characteristics for the op amps, distin-
guishing between the two configuration types where
applicable.
25.1.1 OP AMP CONFIGURATION A
Figure 25-6 shows a typical inverting amplifier circuit
taking advantage of the internal connections from the
op amp output to the input of the ADC. The advantage of
this configuration is that the user does not need to con-
sume another analog input (ANy) on the device, and
allows the user to simultaneously sample all three op
amps with the ADC module, if needed. However, the
presence of the internal resistance, R
INT1, adds an error
in the feedback path. Since R
INT1 is an internal resis-
tance, in relation to the op amp output (V
OAxOUT) and
ADC internal connection (V
ADC), RINT1 must be included
in the numerator term of the transfer function. See
Table 30-53 in Section 30.0 “Electrical Characteris-
tics” for the typical value of R
INT1. Table 30-60 and
Table 30-61 in Section 30.0 “Electrical Characteris-
tics” describe the minimum sample time (TSAMP)
requirements for the ADC module in this configuration.
Figure 25-6 also defines the equations that should be
used when calculating the expected voltages at points,
V
ADC and VOAXOUT.
FIGURE 25-6: OP AMP CONFIGURATION A
–
+
CxIN1-
CxIN1+
R
1
ADC
(3)
OAxOUT
R
INT1
(1)
RFEEDBACK
(2)
OAx
(to ADC)
Op Ampx
Note 1: See Table 30-53 for the Typical value.
2: See Table 30-53 for the Minimum value for the feedback resistor.
3: See Table 30-60 and Table 30-61 for the minimum sample time (TSAMP).
4: CV
REF1O or CVREF2O are two options that are available for supplying bias voltage to the op amps.
V
IN
VADC
(VOAXOUT)
V
OAxOUT
R
FEEDBACK
R
1
------------------------------


Bias Voltage V–
IN
=
V
ADC
R
FEEDBACK
R
INT1
+
R
1
---------------------------------------------------


Bias Voltage V–
IN
=
Bias
Voltage
(4)