Datasheet
2011-2013 Microchip Technology Inc. DS70657G-page 279
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
20.0 UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
The dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/
50X and PIC24EPXXXGP/MC20X family of devices
contains two UART modules.
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and PIC24EPXXXGP/
MC20X device family. The UART is a full-duplex
asynchronous system that can communicate with
peripheral devices, such as personal computers, LIN/
J2602, RS-232 and RS-485 interfaces. The module also
supports a hardware flow control option with the UxCTS
and UxRTS pins, and also includes an IrDA
®
encoder and
decoder.
The primary features of the UARTx module are:
• Full-Duplex, 8 or 9-Bit Data Transmission through
the UxTX and UxRX Pins
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS
and
UxRTS Pins
• Fully Integrated Baud Rate Generator with 16-Bit
Prescaler
• Baud Rates Ranging from 4.375 Mbps to 67 bps at
16x mode at 70 MIPS
• Baud Rates Ranging from 17.5 Mbps to 267 bps at
4x mode at 70 MIPS
• 4-Deep First-In First-Out (FIFO) Transmit Data
Buffer
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
(9th bit = 1)
• Transmit and Receive Interrupts
• A Separate Interrupt for all UARTx Error Conditions
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
FIGURE 20-1: UARTx SIMPLIFIED BLOCK DIAGRAM
Note 1: This data sheet summarizes the
features of the dsPIC33EPXXXGP50X,
dsPIC33EPXXXMC20X/50X and
PIC24EPXXXGP/MC20X families of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
Section 17. “UART” (DS70582) of the
“dsPIC33E/PIC24E Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Note: Hardware flow control using UxRTS and
UxCTS is not available on all pin count
devices. See the “Pin Diagrams” section
for availability.
UxRX
Hardware Flow Control
UARTx Receiver
UARTx Transmitter
UxTX
Baud Rate Generator
UxRTS
/BCLKx
UxCTS
IrDA
®