Datasheet

 2011-2013 Microchip Technology Inc. DS70657G-page 13
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Pin Diagrams (Continued)
44-Pin VTLA
(1,2,3)
= Pins are up to 5V tolerant
PIC24EPXXXMC204
1
12
41 40 39 38 37 36 35 34
2
3
4
5
6
7
8
30
29
28
27
26
25
24
23
13 14 15 16 17 18 19
9
10
11
2220 21
33
32
31
424344
PGEC1/AN4/C1IN1+/RPI34/RB2
PGED1/AN5/C1IN1-/RP35/RB3
AN6/OA3OUT/C4IN1+/OCFB/RC0
AN7/C3IN1-/C4IN1-/RC1
AN8/C3IN1+/U1RTS
/BCLK1/FLT3/RC2
V
DD
VSS
OSC1/CLKI/RA2
OSC2/CLKO/RA3
SDA2/RPI24/RA8
FLT32/SCL2/RP36/RB4
TCK/CVREF1O/ASCL1/RP40/T4CK/RB8
RP39/INT0/RB7 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 V
DD
VSS SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CV
REF2O/SDO1/RP20/T1CK/RA4
RPI45/PWM2L/CTPLS/RB13
RPI44/PWM2H/RB12
RP43/PWM3L/RB11
RP42/PWM3H/RB10
V
CAP
VSS
RP57/RC9
RP56/RC8
RP55/RC7
RP54/RC6
TMS/ASDA1/RP41/RB9
TDO/RA10
TDI/RA7
RPI46/PWM1H/T3CK/RB14
RPI47/PWM1L/T5CK/RB15
AV
SS
AVDD
MCLR
AN0/OA2OUT/RA0
AN1/C2IN1+/RA1
PGED3/V
REF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
PGEC3/V
REF+/AN3/OA1OUT/RPI33/CTED1/RB1
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O
Ports” for more information.
3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected
to V
SS externally.
dsPIC33EPXXXMC204/504