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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 64 (14x14) 16-Bit 30 null I/O number 52
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Table Of Contents
© 2011 Microchip Technology Inc. DS70143E-page 227
dsPIC30F6011A/6012A/6013A/6014A
I/O Ports.............................................................................. 61
Parallel (PIO) .............................................................. 61
I
2
C 10-bit Slave Mode Operation ........................................ 97
Reception.................................................................... 98
Transmission............................................................... 98
I
2
C 7-bit Slave Mode Operation .......................................... 97
Reception.................................................................... 97
Transmission............................................................... 97
I
2
C Master Mode Operation ................................................ 99
Baud Rate Generator................................................ 100
Clock Arbitration........................................................ 100
Multi-Master Communication, Bus Collision and Bus Ar-
bitration ............................................................. 100
Reception.................................................................... 99
Transmission............................................................... 99
I
2
C Master Mode Support ................................................... 99
I
2
C Module .......................................................................... 95
Addresses ................................................................... 97
Bus Data Timing Characteristics
Master Mode..................................................... 203
Slave Mode....................................................... 205
Bus Data Timing Requirements
Master Mode..................................................... 204
Slave Mode....................................................... 206
Bus Start/Stop Bits Timing Characteristics
Master Mode..................................................... 203
Slave Mode....................................................... 205
General Call Address Support .................................... 99
Interrupts..................................................................... 99
IPMI Support ............................................................... 99
Operating Function Description .................................. 95
Operation During CPU Sleep and Idle Modes .......... 100
Pin Configuration ........................................................ 95
Programmer’s Model................................................... 95
Register Map............................................................. 101
Registers..................................................................... 95
Slope Control .............................................................. 99
Software Controlled Clock Stretching (STREN = 1).... 98
Various Modes ............................................................ 95
I
2
S Mode Operation .......................................................... 131
Data Justification....................................................... 131
Frame and Data Word Length Selection................... 131
Idle Current (I
IDLE) ............................................................ 177
In-Circuit Debugger (ICD 2) .............................................. 159
In-Circuit Serial Programming (ICSP) ......................... 51, 143
Initialization Condition for RCON Register Case 1 ........... 156
Initialization Condition for RCON Register Case 2 ........... 156
Input Capture (CAPX) Timing Characteristics .................. 193
Input Capture Module ......................................................... 81
Interrupts..................................................................... 82
Register Map............................................................... 83
Input Capture Operation During Sleep and Idle Modes ...... 82
CPU Idle Mode............................................................ 82
CPU Sleep Mode ........................................................ 82
Input Capture Timing Requirements ................................. 193
Input Change Notification Module....................................... 66
Register Map for dsPIC30F6011A/6012 A (Bits 7-0) .. 66
Register Map for dsPIC30F6011A/6012A (Bits 15-8) . 66
Register Map for dsPIC30F6013A/6014A (Bits 15-8) . 66
Register Map for dsPIC30F6013A/6014A (Bits 7-0) ... 66
Instruction Addressing Modes............................................. 39
File Register Instructions ............................................ 39
Fundamental Modes Supported.................................. 39
MAC Instructions......................................................... 40
MCU Instructions ........................................................ 39
Move and Accumulator Instructions ........................... 40
Other Instructions ....................................................... 40
Instruction Set
Overview................................................................... 164
Summary .................................................................. 161
Internet Address ............................................................... 227
Interrupt Controller
Register Map .............................................................. 50
Interrupt Priority .................................................................. 46
Interrupt Sequence ............................................................. 48
Interrupt Stack Frame................................................. 49
Interrupts ............................................................................ 45
L
Load Conditions................................................................ 183
Low Voltage Detect (LVD) ................................................ 157
Low-Voltage Detect Characteristics.................................. 180
LVDL Characteristics ........................................................ 181
M
Memory Organization ......................................................... 25
Core Register Map ..................................................... 37
Microchip Internet Web Site.............................................. 227
Modes of Operation
Disable...................................................................... 113
Initialization............................................................... 113
Listen All Messages.................................................. 113
Listen Only................................................................ 113
Loopback .................................................................. 113
Normal Operation ..................................................... 113
Module................................................................................ 95
Modulo Addressing............................................................. 40
Applicability................................................................. 42
Operation Example..................................................... 41
Start and End Address ............................................... 41
W Address Register Selection.................................... 41
MPLAB ASM30 Assembler, Linker, Librarian................... 170
MPLAB Integrated Development Environment Software.. 169
MPLAB PM3 Device Programmer .................................... 172
MPLAB REAL ICE In-Circuit Emulator System ................ 171
MPLINK Object Linker/MPLIB Object Librarian ................ 170
N
NVM
Register Map .............................................................. 55
O
OC/PWM Module Timing Characteristics ......................... 194
Operating Current (I
DD) .................................................... 176
Oscillator
Control Registers...................................................... 149
Operating Modes (Table).......................................... 144
System Overview...................................................... 143
Oscillator Configurations................................................... 146
Fail-Safe Clock Monitor ............................................ 148
Fast RC (FRC).......................................................... 147
Initial Clock Source Selection ................................... 146
Low-Power RC (LPRC) ............................................ 148
LP Oscillator Control................................................. 147
Phase Locked Loop (PLL) ........................................ 147
Start-up Timer (OST)................................................ 147
Oscillator Selection........................................................... 143
Oscillator Start-up Timer
Timing Characteristics .............................................. 188
Timing Requirements ............................................... 189
Output Compare Interrupts ................................................. 88