Datasheet

© 2006 Microchip Technology Inc. DS70143C-page 217
dsPIC30F6011A/6012A/6013A/6014A
INDEX
A
A/D.................................................................................... 135
Aborting a Conversion .............................................. 137
ADCHS Register.......................................................135
ADCON1 Register..................................................... 135
ADCON2 Register..................................................... 135
ADCON3 Register..................................................... 135
ADCSSL Register ..................................................... 135
ADPCFG Register.....................................................135
Configuring Analog Port Pins.............................. 64, 143
Connection Considerations....................................... 143
Conversion Operation............................................... 136
Effects of a Reset......................................................142
Operation During CPU Idle Mode .............................142
Operation During CPU Sleep Mode.......................... 142
Output Formats.........................................................142
Power-down Modes .................................................. 142
Programming the Sample Trigger............................. 137
Register Map.............................................................144
Result Buffer .............................................................136
Sampling Requirements............................................ 141
Selecting the Conversion Sequence......................... 136
AC Characteristics ............................................................ 182
Load Conditions........................................................ 182
AC Temperature and Voltage Specifications .................... 182
AC-Link Mode Operation .................................................. 132
16-bit Mode...............................................................132
20-bit Mode...............................................................132
ADC
Selecting the Conversion Clock ................................ 137
ADC Conversion Speeds .................................................. 138
Address Generator Units .................................................... 39
Alternate Vector Table ........................................................ 49
Analog-to-Digital Converter. See A/D.
Assembler
MPASM Assembler...................................................170
Automatic Clock Stretch...................................................... 98
During 10-bit Addressing (STREN = 1).......................98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode.............................................................98
Transmit Mode............................................................98
B
Band Gap Start-up Time
Requirements............................................................188
Timing Characteristics .............................................. 188
Barrel Shifter ....................................................................... 23
Bit-Reversed Addressing .................................................... 42
Example...................................................................... 43
Implementation ...........................................................42
Modifier Values Table ................................................. 43
Sequence Table (16-Entry)......................................... 43
Block Diagrams
12-bit A/D Functional ................................................135
16-bit Timer1 Module.................................................. 70
16-bit Timer2............................................................... 75
16-bit Timer3............................................................... 75
16-bit Timer4............................................................... 80
16-bit Timer5............................................................... 80
32-bit Timer2/3............................................................ 74
32-bit Timer4/5............................................................ 79
CAN Buffers and Protocol Engine............................. 112
DCI Module............................................................... 126
Dedicated Port Structure ............................................ 63
DSP Engine................................................................ 20
dsPIC30F6011/6012/6013/6014................................. 10
dsPIC30F6013/6014................................................... 11
External Power-on Reset Circuit .............................. 153
I
2
C .............................................................................. 96
Input Capture Mode.................................................... 83
Oscillator System...................................................... 147
Output Compare Mode............................................... 87
Reset System ........................................................... 151
Shared Port Structure................................................. 64
SPI.............................................................................. 92
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
BOR Characteristics......................................................... 181
BOR. See Brown-out Reset.
Brown-out Reset
Characteristics.......................................................... 180
Timing Requirements ............................................... 187
C
C Compilers
MPLAB C18.............................................................. 170
MPLAB C30.............................................................. 170
CAN Module ..................................................................... 111
Baud Rate Setting .................................................... 116
CAN1 Register Map.................................................. 118
Frame Types ............................................................ 111
I/O Timing Characteristics ........................................ 205
I/O Timing Requirements.......................................... 205
Message Reception.................................................. 114
Message Transmission............................................. 115
Modes of Operation.................................................. 113
Overview................................................................... 111
CLKO and I/O Timing
Characteristics.......................................................... 186
Requirements ........................................................... 186
Code Examples
Data EEPROM Block Erase ....................................... 58
Data EEPROM Block Write ........................................ 60
Data EEPROM Read.................................................. 57
Data EEPROM Word Erase ....................................... 58
Data EEPROM Word Write ........................................ 59
Erasing a Row of Program Memory ........................... 53
Initiating a Programming Sequence ........................... 54
Loading Write Latches................................................ 54
Code Protection................................................................ 145
Core Architecture
Overview..................................................................... 15
CPU Architecture Overview................................................ 15
Customer Change Notification Service............................. 223
Customer Notification Service .......................................... 223
Customer Support............................................................. 223