Datasheet

© 2011 Microchip Technology Inc. DS70149E-page 49
dsPIC30F5015/5016
TABLE 5-3: INTERRUPT CONTROLLER REGISTER MAP FOR dsPIC30F5016
(1)
SFR
Name
ADR Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
INTCON1 0080 NSTDIS
OVATE OVBTE COVTE MATHERR ADDRERR STKERR OSCFAIL
0000 0000 0000 0000
INTCON2 0082 ALTIVT
INT4EP INT3EP INT2EP INT1EP INT0EP
0000 0000 0000 0000
IFS0 0084 CNIF MI2CIF SI2CIF NVMIF ADIF U1TXIF U1RXIF SPI1IF T3IF T2IF OC2IF IC2IF T1IF OC1IF IC1IF INT0IF
0000 0000 0000 0000
IFS1 0086
IC4IF IC3IF C1IF SPI2IF INT2IF T5IF T4IF OC4IF OC3IF —INT1IF
0000 0000 0000 0000
IFS2 0088
FLTBIF FLTAIF QEIIF PWMIF INT4IF INT3IF
0000 0000 0000 0000
IEC0 008C CNIE MI2CIE SI2CIE NVMIE ADIE U1TXIE U1RXIE SPI1IE T3IE T2IE OC2IE IC2IE T1IE OC1IE IC1IE INT0IE
0000 0000 0000 0000
IEC1 008E
IC4IE IC3IE C1IE SPI2IE INT2IE T5IE T4IE OC4IE OC3IE —INT1IE
0000 0000 0000 0000
IEC2 0090
FLTBIE FLTAIE QEIIE PWMIE INT4IE INT3IE
0000 0000 0000 0000
IPC0 0094
T1IP<2:0> —OC1IP<2:0>—IC1IP<2:0> INT0IP<2:0>
0100 0100 0100 0100
IPC1 0096
T31P<2:0> T2IP<2:0> OC2IP<2:0> —IC2IP<2:0>
0100 0100 0100 0100
IPC2 0098
—ADIP<2:0> U1TXIP<2:0> U1RXIP<2:0> SPI1IP<2:0>
0100 0100 0100 0100
IPC3 009A
CNIP<2:0> —MI2CIP<2:0> SI2CIP<2:0> —NVMIP<2:0>
0100 0100 0100 0100
IPC4 009C
OC3IP<2:0> INT1IP<2:0>
0100 0000 0000 0100
IPC5 009E
INT2IP<2:0> T5IP<2:0> T4IP<2:0> —OC4IP<2:0>
0100 0100 0100 0100
IPC6 00A0
C1IP<2:0> SPI2IP<2:0>
0100 0100 0000 0000
IPC7 00A2
—IC4IP<2:0> —IC3IP<2:0>
0000 0000 0100 0100
IPC8 00A4
0000 0000 0000 0100
IPC9 00A6
PWMIP<2:0> —INT41IP<2:0> INT3IP<2:0>
0100 0000 0100 0100
IPC10 00A8
FLTAIP<2:0> —QEIIP<2:0>
0100 0000 0000 0100
IPC11 00AA
FLTBIP<2:0>
0000 0000 0000 0100
Legend: — = unimplemented bit, read as ‘0
Note 1: Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.