Datasheet

© 2011 Microchip Technology Inc. DS70149E-page 229
dsPIC30F5015/5016
A/D Conversion ........................................................ 216
Band Gap Start-up Time .......................................... 193
CAN Module I/O ....................................................... 211
CLKOUT and I/O ...................................................... 191
External Clock .......................................................... 187
Input Capture ........................................................... 197
I
2
C Bus Data (Master Mode) .................................... 208
I
2
C Bus Data (Slave Mode) ...................................... 210
Motor Control PWM Module ..................................... 199
Output Compare ...................................................... 197
QEI Module External Clock ...................................... 196
QEI Module Index Pulse .......................................... 201
Quadrature Decoder ................................................ 200
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
er-up Timer and Brown-out Reset ................... 193
Simple OC/PWM Mode ............................................ 198
SPI Master Mode (CKE = 0) .................................... 202
SPI Master Mode (CKE = 1) .................................... 203
SPI Slave Mode (CKE = 0) ...................................... 204
SPI Slave Mode (CKE = 1) ...................................... 206
Timer1 External Clock .............................................. 194
Timer2 and Timer4 External Clock .......................... 195
Timer3 and Timer5 External Clock .......................... 195
Timing Specifications
PLL Clock ................................................................. 188
Traps .................................................................................. 45
Hard and Soft ............................................................. 46
Sources ...................................................................... 45
Vectors ....................................................................... 46
U
UART
Address Detect Mode .............................................. 125
Auto-Baud Support .................................................. 126
Baud Rate Generator ............................................... 125
Disabling .................................................................. 123
Enabling ................................................................... 123
Loopback Mode ....................................................... 125
Module Overview ..................................................... 121
Operation During CPU Sleep and Idle Modes ......... 126
Receiving Data ......................................................... 124
In 8-bit or 9-bit Data Mode ............................... 124
Interrupt ........................................................... 124
Receive Buffer (UxRXB) .................................. 124
Reception Error Handling ......................................... 124
Framing Error (FERR Bit) ................................ 125
Idle Status ........................................................ 125
Parity Error (PERR Bit) .................................... 125
Receive Break ................................................. 125
Receive Buffer Overrun Error (OERR Bit) ....... 124
Setting Up Data, Parity and Stop Bit Selections ......123
Transmitting Data ..................................................... 123
In 8-bit Data Mode ........................................... 123
In 9-bit Data Mode ........................................... 123
Interrupt ........................................................... 124
Transmit Buffer (UxTXB) ................................. 123
UART1 Register Map ............................................... 127
Unit ID Locations .............................................................. 151
Universal Asynchronous Receiver Transmitter Module
(UART) ..................................................................... 121
W
Wake-up from Sleep ........................................................ 151
Wake-up from Sleep and Idle ............................................ 47
Watchdog Timer (WDT) ........................................... 151, 161
Enabling and Disabling ............................................ 161
Operation ................................................................. 161
WWW Address ................................................................ 229
WWW, On-Line Support ...................................................... 7
Z
10-Bit High-Speed Analog-to-Digital (A/D)
Converter Module .................................................... 139
16-bit Up/Down Position Counter Mode ............................ 92
Count Direction Status ............................................... 92
Error Checking ........................................................... 92
8-Output PWM
Register Map ........................................................... 107