Datasheet

dsPIC30F5015/5016
DS70149E-page 228 © 2011 Microchip Technology Inc.
Continuous Up/Down Counting Modes ..............99
Double Update Mode ....................................... 100
Free-Running Mode ........................................... 99
Postscaler ........................................................ 100
Prescaler .......................................................... 100
Single-Shot Mode .............................................. 99
Update Lockout ........................................................ 106
Q
Quadrature Encoder Interface (QEI) .................................. 91
Interrupts .................................................................... 94
Logic .......................................................................... 92
Operation During CPU Idle Mode ..............................93
Operation During CPU Sleep Mode ...........................93
Register Map .............................................................. 95
Timer Operation During CPU Idle Mode ....................93
Timer Operation During CPU Sleep Mode ................. 93
R
Reader Response ............................................................ 230
Reset ........................................................................ 151, 157
Reset Sequence ................................................................. 45
Reset Sources ........................................................... 45
Resets
BOR, Programmable ................................................ 159
POR ......................................................................... 157
POR with Long Crystal Start-up Time ...................... 159
POR, Operating without FSCM and PWRT .............159
Run-Time Self-Programming (RTSP) ................................51
Control Registers .......................................................52
NVMADR ........................................................... 52
NVMADRU ......................................................... 52
NVMCON ........................................................... 52
NVMKEY ............................................................ 52
Operation ................................................................... 52
S
Simple Capture Event Mode
Capture Buffer Operation ........................................... 82
Capture Prescaler ......................................................81
Hall Sensor Mode ...................................................... 82
Timer2 and Timer3 Selection Mode ........................... 82
Simple Output Compare Match Mode ................................ 86
Simple PWM Mode ............................................................86
Input Pin Fault Protection ...........................................86
Period ......................................................................... 87
Software Simulator (MPLAB SIM) .................................... 175
Software Stack Pointer, Frame Pointer .............................. 18
CALL Stack Frame ..................................................... 33
SPI Module ....................................................................... 109
Framed SPI Support ................................................111
Operating Function Description ............................... 109
Operation During CPU Idle Mode ............................111
Operation During CPU Sleep Mode .........................111
SDOx Disable .......................................................... 110
Slave Select Synchronization .................................. 111
SPI1 Register Map ................................................... 112
SPI2 Register Map ................................................... 112
Word and Byte Communication ...............................109
STATUS Register ............................................................... 18
Symbols Used in Opcode Descriptions ............................166
System Integration ........................................................... 151
Register Map ............................................................ 164
T
Timer1 Module ...................................................................67
Gate Operation .......................................................... 68
Interrupt ..................................................................... 69
Operation During Sleep Mode ................................... 68
Prescaler ................................................................... 68
Real-Time Clock ........................................................ 69
Interrupts ........................................................... 69
Oscillator Operation ........................................... 69
Register Map ............................................................. 70
16-bit Asynchronous Counter Mode .......................... 67
16-bit Synchronous Counter Mode ............................ 67
16-bit Timer Mode ...................................................... 67
Timer2/3 Module ................................................................ 71
ADC Event Trigger ..................................................... 74
Gate Operation .......................................................... 74
Interrupt ..................................................................... 74
Operation During Sleep Mode ................................... 74
Register Map ............................................................. 75
Timer Prescaler ......................................................... 74
16-bit Mode ................................................................ 71
32-bit Synchronous Counter Mode ............................ 71
32-bit Timer Mode ...................................................... 71
Timer4/5 Module ................................................................ 77
Register Map ............................................................. 79
Timing Diagrams
Band Gap Start-up Time .......................................... 193
Brown-out Reset ...................................................... 184
CAN Bit .................................................................... 134
CAN Module I/O ....................................................... 211
Center-Aligned PWM ............................................... 101
CLKOUT and I/O ..................................................... 191
Dead-Time ............................................................... 103
Edge-Aligned PWM ................................................. 101
External Clock .......................................................... 186
Input Capture (CAPx) .............................................. 197
I
2
C Bus Data (Master Mode) ................................... 207
I
2
C Bus Data (Slave Mode) ..................................... 209
I
2
C Bus Start/Stop Bits (Master Mode) .................... 207
I
2
C Bus Start/Stop Bits (Slave Mode) ...................... 209
Motor Control PWM Module .................................... 199
Motor Control PWM Module Fault ........................... 199
OC/PWM Module ..................................................... 198
Output Compare (OCx) ............................................ 197
PWM Output .............................................................. 87
QEA/QEB Input Characteristics ............................... 200
QEI Module Index Pulse .......................................... 201
Reset, Watchdog Timer, Oscillator Start-up Timer and
Power-up Timer ............................................... 192
SPI Master Mode (CKE = 0) .................................... 202
SPI Master Mode (CKE = 1) .................................... 203
SPI Slave Mode (CKE = 0) ...................................... 204
SPI Slave Mode (CKE = 1) ...................................... 205
Time-out Sequence on Power-up (MCLR
Not Tied to
V
DD), Case 1 ................................................... 158
Time-out Sequence on Power-up (MCLR
Not Tied to
V
DD), Case 2 ................................................... 158
Time-out Sequence on Power-up (MCLR
Tied to VDD) .
158
TimerQ (QEI Module) External Clock ...................... 196
Timer1, 2, 3, 4, 5 External Clock ............................. 194
10-bit High-Speed A/D Conversion (CHPS = 01,
SIMSAM = 0, ASAM = 0, SSRC = 000) ........... 214
10-bit High-Speed A/D Conversion (CHPS = 01,
SIMSAM = 0, ASAM = 1, SSRC = 111, SAMC =
00001) ............................................................. 215
Timing Requirements