Datasheet

© 2011 Microchip Technology Inc. DS70149E-page 227
dsPIC30F5015/5016
Transmission ............................................................ 117
I
2
C Module ....................................................................... 113
Addresses ................................................................ 115
General Call Address Support ................................. 117
Interrupts .................................................................. 117
IPMI Support ............................................................ 117
Master Operation ..................................................... 117
Master Support ........................................................ 117
Operating Function Description ............................... 113
Operation During CPU Sleep and Idle Modes ......... 118
Pin Configuration ..................................................... 113
Programmer’s Model ................................................ 113
Register Map ............................................................ 119
Registers .................................................................. 113
Slope Control ........................................................... 117
Software Controlled Clock Stretching (STREN = 1) . 116
Various Modes ......................................................... 113
I
2
C 10-bit Slave Mode Operation ..................................... 115
Reception ................................................................. 116
Transmission ............................................................ 116
I
2
C 7-bit Slave Mode Operation ....................................... 115
Reception ................................................................. 115
Transmission ............................................................ 115
M
Memory Organization ......................................................... 25
Microchip Internet Web Site ............................................. 229
Modulo Addressing ............................................................ 38
Applicability ................................................................ 40
Operation Example .................................................... 39
Start and End Address ............................................... 39
W Address Register Selection ................................... 39
Motor Control PWM Module ............................................... 97
MPLAB ASM30 Assembler, Linker, Librarian .................. 174
MPLAB Integrated Development Environment Software . 173
MPLAB PM3 Device Programmer ................................... 176
MPLAB REAL ICE In-Circuit Emulator System ................ 175
MPLINK Object Linker/MPLIB Object Librarian ............... 174
N
NVM
Register Map .............................................................. 55
O
Operating Current (IDD) .................................................... 180
Oscillator
Operating Modes (Table) ......................................... 152
System Overview ..................................................... 151
Oscillator Configurations .................................................. 154
Fail-Safe Clock Monitor ............................................ 156
Fast RC (FRC) ......................................................... 155
Initial Clock Source Selection .................................. 154
Low-Power RC (LPRC) ............................................ 156
LP Oscillator Control ................................................ 155
Phase-Locked Loop (PLL) ....................................... 155
Start-up Timer (OST) ............................................... 155
Oscillator Selection .......................................................... 151
Output Compare Module .................................................... 85
Interrupts .................................................................... 88
Operation During CPU Idle Mode .............................. 88
Operation During CPU Sleep Mode ........................... 88
Register Map .............................................................. 89
Timer2, Timer3 Selection Mode ................................. 86
P
Packaging
Information ............................................................... 217
Marking .................................................................... 217
Peripheral Module Disable (PMD) Registers ................... 163
Pinout Descriptions
dsPIC30F5015 ........................................................... 11
dsPIC30F5016 ........................................................... 14
POR. See Power-on Reset.
Port Write/Read Example .................................................. 62
Position Measurement Mode ............................................. 92
Power-Down Current (I
PD) ............................................... 182
Power-on Reset (POR) .................................................... 151
Oscillator Start-up Timer (OST) ............................... 151
Power-up Timer (PWRT) ......................................... 151
Power-Saving Modes ....................................................... 161
Idle ........................................................................... 162
Sleep ....................................................................... 161
Power-Saving Modes (Sleep and Idle) ............................ 151
Program Address Space .................................................... 25
Construction .............................................................. 26
Data Access from Program Memory Using Program
Space Visibility .................................................. 28
Data Access from Program Memory Using Table Instruc-
tions ................................................................... 27
Data Access from, Address Generation .................... 26
Memory Map .............................................................. 25
Table Instructions
TBLRDH ............................................................ 27
TBLRDL ............................................................. 27
TBLWTH ............................................................ 27
TBLWTL ............................................................ 27
Program Counter ............................................................... 18
Program Data Table Access (MSB) ................................... 28
Program Space Visibility
Window into Program Space Operation .................... 29
Programmable ................................................................. 151
Programmable Digital Noise Filters ................................... 93
Programmer’s Model ......................................................... 18
Protection Against Accidental Writes to OSCCON .......... 157
PWM
Center-Aligned ......................................................... 101
Complementary Operation ...................................... 102
Dead-Time Generators ............................................ 102
Assignment ...................................................... 103
Ranges ............................................................ 103
Selection Bits ................................................... 103
Duty Cycle Comparison Units .................................. 101
Immediate Updates ......................................... 102
Register Buffers ............................................... 102
Edge-Aligned ........................................................... 100
Fault Pins ................................................................. 105
Enable Bits ...................................................... 105
Fault States ..................................................... 105
Input Modes ..................................................... 105
Priority ............................................................. 105
Independent Output ................................................. 104
Operation During CPU Idle Mode ............................ 106
Operation During CPU Sleep Mode ........................ 106
Output and Polarity Control ..................................... 105
Output Pin Control ........................................... 105
Output Override ....................................................... 104
Complementary Output Mode ......................... 104
Synchronization ............................................... 104
Period ...................................................................... 100
Single-Pulse Operation ............................................ 104
Special Event Trigger .............................................. 106
Postscaler ........................................................ 106
Time Base ................................................................. 99