Datasheet

© 2011 Microchip Technology Inc. DS70149E-page 223
dsPIC30F5015/5016
APPENDIX A: REVISION HISTORY
Revision A (July 2005)
Original data sheet for dsPIC30F5015/5016 devices.
Revision B (September 2006)
Revision B of this data sheet reflects these changes:
• Base instruction CP1 removed (see Table 22-2)
• Supported I
2
C Slave Addresses (see Table 17-1)
• ADC Conversion Clock selection (see
Section 20.0 “10-bit High-Speed Analog-to-
Digital Converter (ADC) Module”)
• Revised Electrical Characteristics
- Operating current (I
DD) specifications
(see Table 24-6)
- Idle current (I
IDLE) specifications
(see Table 24-7)
- Power-down current (I
PD) specifications
(see Table 24-8)
- I/O Pin input specifications
(see Table 24-9)
- BOR voltage limits
(see Table 24-11)
- Watchdog Timer limits
(see Table 24-21)
Revision C (January 2007)
This revision includes updates to the packaging
diagram.
Revision D (March 2008)
This revision reflects these updates:
• Changed the location of the input reference in the
10-bit High-Speed ADC Functional Block Diagram
(see Figure 20-1)
• Added FUSE Configuration Register (FICD)
details (see Section 21.6 “Device Configuration
Registers” and Table 21-8)
• Added Note 2 in Device Configuration Registers
table (Table 21-8)
• Removed erroneous statement regarding genera-
tion of CAN receive errors (see Section 19.4.5
“Receive Errors”)
• Electrical Specifications:
- Resolved TBD values for parameters DO10,
DO16, DO20, and DO26 (see Table 24-10)
- 10-bit High-Speed ADC t
PDU timing parame-
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table 24-41)
- Parameter OS65 (Internal RC Accuracy) has
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table 24-19)
- Parameter DC12 (RAM Data Retention Volt-
age) Min and Max values have been updated
(see Table 24-5)
- Parameter D134 (Erase/Write Cycle Time)
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 24-12)
- Removed parameters OS62 (Internal FRC
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 24-18)
- Parameter OS63 (Internal FRC Accuracy)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 24-18)
- Updated Min and Max values and Conditions
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see Table 24-21)
• Removed dsPIC30F6010 device reference from
the third paragraph of Section 7.0 “Data
EEPROM Memory”
• Removed IC5 and IC6 pin references from the
64-pin TQFP pin diagram (see “Pin Diagram”)
and Figure 1-1
• Changed Interrupt Vectors 40-43 to Reserved
(see Table 5-1)
• Updated PMD2 SFR – bits 15-12 and 7-4 are
unimplemented (see Table 21-7)
• Additional minor corrections throughout the
document