Datasheet
© 2011 Microchip Technology Inc. DS70149E-page 65
dsPIC30F5015/5016
8.3 Input Change Notification Module
The input change notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor in response to a change-of-
state on selected input pins. This module is capable of
detecting input change-of-states, even in Sleep mode
when the clocks are disabled. There are 22 external
signals (CN0 through CN21) that may be selected
(enabled) for generating an interrupt request on a
change-of-state.
Please refer to the pin diagrams for CN pin locations.
TABLE 8-3: INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 15-8) FOR dsPIC30F5015
(1)
TABLE 8-4: INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 7-0) FOR dsPIC30F5015
(1)
TABLE 8-5: INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 15-8) FOR dsPIC30F5016
(1)
TABLE 8-6: INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 7-0) FOR dsPIC30F5016
(1)
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Reset State
CNEN1 00C0 CN15IE CN14IE CN13IE CN12IE CN11IE CN10IE CN9IE CN8IE
0000 0000 0000 0000
CNEN2 00C2
— — — — — — — — 0000 0000 0000 0000
CNPU1 00C4 CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE CN8PUE
0000 0000 0000 0000
CNPU2 00C6
— — — — — — — — 0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
SFR
Name
Addr. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
CNEN1 00C0 CN7IE CN6IE CN5IE CN4IE CN3IE CN2IE CN1IE CN0IE
0000 0000 0000 0000
CNEN2 00C2
— —
— — — CN18IE CN17IE CN16IE
0000 0000 0000 0000
CNPU1 00C4 CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE
0000 0000 0000 0000
CNPU2 00C6
— —
— — — CN18PUE CN17PUE CN16PUE
0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Reset State
CNEN1 00C0 CN15IE CN14IE CN13IE CN12IE CN11IE CN10IE CN9IE CN8IE
0000 0000 0000 0000
CNEN2 00C2
— — — — — — — — 0000 0000 0000 0000
CNPU1 00C4 CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE CN10PUE CN9PUE CN8PUE
0000 0000 0000 0000
CNPU2 00C6
— — — — — — — — 0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
SFR
Name
Addr. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
CNEN1 00C0 CN7IE CN6IE CN5IE CN4IE CN3IE CN2IE CN1IE CN0IE
0000 0000 0000 0000
CNEN2 00C2
— —
CN21IE CN20IE CN19IE CN18IE CN17IE CN16IE
0000 0000 0000 0000
CNPU1 00C4 CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE
0000 0000 0000 0000
CNPU2 00C6
— —
CN21PUE CN20PUE CN19PUE CN18PUE CN17PUE CN16PUE
0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.