Datasheet

dsPIC30F5015/5016
DS70149E-page 226 © 2011 Microchip Technology Inc.
Register Map .............................................................. 34
Core Overview ...................................................................17
CPU Architecture Overview ...............................................17
Customer Change Notification Service ............................ 229
Customer Notification Service .......................................... 229
Customer Support ............................................................ 229
D
Data Address Space .......................................................... 29
Alignment ................................................................... 32
Alignment (Figure) ..................................................... 32
Effect of Invalid Memory Accesses ............................32
MCU and DSP (MAC Class) Instructions Example .... 31
Memory Map ........................................................ 29, 30
Near Data Space ....................................................... 33
Software Stack ........................................................... 33
Spaces ....................................................................... 32
Width .......................................................................... 32
Data EEPROM Memory ..................................................... 57
Erasing ....................................................................... 58
Erasing, Block ............................................................ 58
Erasing, Word ............................................................ 58
Protection Against Spurious Write .............................60
Reading ...................................................................... 57
Write Verify ................................................................ 60
Writing ........................................................................ 59
Writing, Block ............................................................. 60
Writing, Word .............................................................59
DC Characteristics ...........................................................178
I/O Pin Input Specifications ...................................... 183
I/O Pin Output Specifications ...................................184
Idle Current (I
IDLE) ................................................... 181
Operating Current (I
DD) ............................................ 180
Operating MIPS vs Voltage
dsPIC30F5015 ................................................. 178
dsPIC30F5016 ................................................. 178
Power-Down Current (I
PD) ....................................... 182
Program and EEPROM ............................................ 185
Temperature and Voltage Specifications .................179
Thermal Operating Conditions ................................. 178
Development Support ......................................................173
Device Configuration
Register Map ............................................................ 164
Device Configuration Registers ........................................ 162
FBORPOR ............................................................... 162
FGS .......................................................................... 162
FOSC ....................................................................... 162
FWDT ....................................................................... 162
Device Overview ..................................................................9
Divide Support .................................................................... 20
DSP Engine ........................................................................ 20
Data Accumulators and Adder/Subtracter ................. 22
Accumulator Write Back ..................................... 23
Data Space Write Saturation .............................24
Overflow and Saturation ....................................22
Round Logic ....................................................... 23
Multiplier ..................................................................... 22
dsPIC30F5015 PORT
Register Map .............................................................. 63
dsPIC30F5016 PORT
Register Map .............................................................. 64
Dual Output Compare Match Mode ...................................86
Continuous Pulse Mode ............................................. 86
Single Pulse Mode ..................................................... 86
E
Electrical Characteristics ................................................. 177
Equations
A/D Conversion Clock .............................................. 142
Baud Rate ................................................................ 125
PWM Period ............................................................. 100
PWM Period (Up/Down Mode) ................................ 100
PWM Resolution ...................................................... 100
Serial Clock Rate ..................................................... 118
Time Quantum for Clock Generation ....................... 135
Errata ................................................................................... 7
F
Fast Context Saving .......................................................... 47
Flash Program Memory ..................................................... 51
Erasing a Row ........................................................... 53
Initiating Programming Sequence .............................. 54
Loading Write Latches ............................................... 54
Operations ................................................................. 53
Programming Algorithm ............................................. 53
Table Instruction Operation Summary ....................... 51
I
I/O Ports ............................................................................. 61
Parallel I/O (PIO) ....................................................... 61
Idle Current (I
IDLE) ........................................................... 181
In-Circuit Debugger .......................................................... 163
In-Circuit Serial Programming (ICSP) ........................ 51, 151
Initialization Condition for RCON Register Case 1 .......... 160
Initialization Condition for RCON Register Case 2 .......... 160
Input Capture Module ........................................................ 81
Interrupts ................................................................... 82
Operation During Sleep and Idle Modes .................... 82
Register Map ............................................................. 83
Simple Capture Event Mode ...................................... 81
Input Change Notification Module ...................................... 65
Register Map (Bits 15-8 for dsPIC30F5015) .............. 65
Register Map (Bits 15-8 for dsPIC30F5016) .............. 65
Register Map (Bits 7-0 for dsPIC30F5015) ................ 65
Register Map (Bits 7-0 for dsPIC30F5016) ................ 65
Instruction Addressing Modes ........................................... 37
File Register Instructions ........................................... 37
Fundamental Modes Supported ................................ 37
MAC Instructions ....................................................... 38
MCU Instructions ....................................................... 37
Move and Accumulator Instructions ........................... 38
Other Instructions ...................................................... 38
Instruction Set
Overview .................................................................. 168
Summary ................................................................. 165
Internet Address .............................................................. 229
Interrupt Vector Table (IVT) ............................................... 47
Interrupts ............................................................................ 43
Controller
Register Map for dsPIC30F5015 ....................... 48
Register Map for dsPIC30F5016 ....................... 49
External Requests ..................................................... 47
Interrupt Stack Frame ................................................ 47
Priority ....................................................................... 44
Sequence .................................................................. 47
I
2
C Master Mode
Baud Rate Generator .............................................. 117
Clock Arbitration ...................................................... 118
Multi-Master Communication, Bus Collision and Bus Ar-
bitration ............................................................ 118
Reception ................................................................ 117