Datasheet

dsPIC30F5011/5013
DS70116J-page 118 © 2011 Microchip Technology Inc.
FIGURE 18-1: DCI MODULE BLOCK DIAGRAM
BCG Control bits
16-bit Data Bus
Sample Rate
Generator
SCKD
FSD
DCI Buffer
Frame
Synchronization
Generator
Control Unit
DCI Shift Register
Receive Buffer
Registers w/Shadow
FOSC/4
Word Size Selection bits
Frame Length Selection bits
DCI Mode Selection bits
CSCK
COFS
CSDI
CSDO
15
0
Transmit Buffer
Registers w/Shadow