Datasheet

 2010 Microchip Technology Inc. DS70138G-page 57
dsPIC30F3014/4013
TABLE 7-2: INPUT CHANGE NOTIFICATION REGISTER MAP FOR dsPIC30F3014/4013 DEVICES (BITS 15-0)
(1)
SFR
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
CNEN1 00C0
— — — — — — — — CN7IE CN6IE CN5IE CN4IE CN3IE CN2IE CN1IE CN0IE 0000 0000 0000 0000
CNEN2 00C2
— — — — — — — — — — — — — CN18IE CN17IE — 0000 0000 0000 0000
CNPU1 00C4
— — — — — — — — CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE 0000 0000 0000 0000
CNPU2 00C6
— — — — — — — — — — — — — CN18PUE CN17PUE — 0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.