Datasheet

 2010 Microchip Technology Inc. DS70138G-page 3
dsPIC30F3014/4013
High-Performance Modified RISC CPU:
• Modified Harvard Architecture
• C Compiler Optimized Instruction Set Architecture
• Flexible Addressing modes
• 83 Base Instructions
• 24-Bit Wide Instructions, 16-Bit Wide Data Path
• Up to 48 Kbytes On-Chip Flash Program Space
• 2 Kbytes of On-Chip Data RAM
• 1 Kbyte of Nonvolatile Data EEPROM
• 16 x 16-Bit Working Register Array
• Up to 30 MIPS Operation:
- DC to 40 MHz External Clock Input
- 4 MHz-10 MHz Oscillator Input with
PLL Active (4x, 8x, 16x)
• Up to 33 Interrupt Sources:
- 8 user-selectable priority levels
- 3 external interrupt sources
- 4 processor traps
DSP Features:
• Dual Data Fetch
• Modulo and Bit-Reversed modes
• Two 40-Bit Wide Accumulators with Optional
saturation Logic
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• All DSP Instructions are Single Cycle
- Multiply-Accumulate (MAC) Operation
• Single-Cycle ±16 Shift
Peripheral Features:
• High-Current Sink/Source I/O Pins: 25 mA/25 mA
• Up to Five 16-Bit Timers/Counters; Optionally Pair
Up
16-Bit Timers into 32-Bit Timer modules
• Up to Four 16-Bit Capture Input Functions
• Up to Four 16-Bit Compare/PWM Output Functions
• Data Converter Interface (DCI) Supports Common
Audio Codec Protocols, Including I
2
S and AC’97
• 3-Wire SPI module (supports 4 Frame modes)
•I
2
C™ module Supports Multi-Master/Slave mode
and 7-Bit/10-Bit Addressing
• Up to Two Addressable UART modules with FIFO
Buffers
• CAN bus module Compliant with CAN 2.0B
Standard
Analog Features:
• 12-Bit Analog-to-Digital Converter (ADC) with:
- 200 ksps conversion rate
- Up to 13 input channels
- Conversion available during Sleep and Idle
• Programmable Low-Voltage Detection (PLVD)
• Programmable Brown-out Reset
Special Microcontroller Features:
• Enhanced Flash Program Memory:
- 10,000 erase/write cycle (min.) for
industrial temperature range, 100K (typical)
• Data EEPROM Memory:
- 100,000 erase/write cycle (min.) for
industrial temperature range, 1M (typical)
• Self-Reprogrammable under Software Control
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Flexible Watchdog Timer (WDT) with On-Chip
Low-Power RC Oscillator for Reliable Operation
• Fail-Safe Clock Monitor Operation:
- Detects clock failure and switches to on-chip
low-power RC oscillator
• Programmable Code Protection
• In-Circuit Serial Programming™ (ICSP™)
• Selectable Power Management modes:
- Sleep, Idle and Alternate Clock modes
Note: This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC Pro-
grammer’s Reference Manual”
(DS70157).
High-Performance, 16-Bit Digital Signal Controllers