Datasheet

dsPIC30F3014/4013
DS70138G-page 222  2010 Microchip Technology Inc.
Sleep.........................................................................155
Power-up Timer
Timing Requirements................................................187
Program Address Space.....................................................25
Construction................................................................26
Data Access from Program Memory
Using Program Space Visibility...........................28
Data Access From Program Memory
Using Table Instructions .....................................27
Data Access from, Address Generation...................... 26
Data Space Window into Operation............................29
Data Table Access (lsw) .............................................27
Data Table Access (MSB)...........................................28
dsPIC30F3014 Memory Map ......................................25
dsPIC30F4013 Memory Map ......................................25
Table Instructions
TBLRDH..............................................................27
TBLRDL ..............................................................27
TBLWTH .............................................................27
TBLWTL..............................................................27
Program and EEPROM Characteristics............................180
Program Counter.................................................................16
Programmable...................................................................141
Programmer’s Model...........................................................16
Diagram ......................................................................17
Programming Operations....................................................45
Algorithm for Program Flash .......................................45
Erasing a Row of Program Memory............................45
Initiating the Programming Sequence......................... 46
Loading Write Latches ................................................46
Protection Against Accidental Writes to OSCCON ...........146
R
Reader Response .............................................................226
Registers
OSCCON (Oscillator Control) ...................................147
OSCTUN (Oscillator Tuning) ....................................149
Reset......................................................................... 141, 151
BOR, Programmable.................................................153
Brown-out Reset (BOR) ............................................141
Oscillator Start-up Timer (OST) ................................141
POR
Operating without FSCM and PWRT................153
With Long Crystal Start-up Time.......................153
POR (Power-on Reset).............................................151
Power-on Reset (POR).............................................141
Power-up Timer (PWRT) ..........................................141
Reset Sequence..................................................................61
Reset Sources ............................................................61
Reset Sources
Brown-out Reset (BOR) ..............................................61
Illegal Instruction Trap.................................................61
Trap Lockout...............................................................61
Uninitialized W Register Trap .....................................61
Watchdog Time-out.....................................................61
Reset Timing Requirements.............................................. 187
Revision History ................................................................217
Run-Time Self-Programming (RTSP) .................................43
S
Simple Capture Event Mode ...............................................81
Buffer Operation..........................................................82
Hall Sensor Mode .......................................................82
Prescaler.....................................................................81
Timer2 and Timer3 Selection Mode............................82
Simple OCx/PWM Mode Timing Requirements................191
Simple Output Compare Match Mode ................................ 86
Simple PWM Mode............................................................. 86
Input Pin Fault Protection ........................................... 86
Period ......................................................................... 87
Software Simulator (MPLAB SIM) .................................... 169
Software Stack Pointer, Frame Pointer .............................. 16
CALL Stack Frame ..................................................... 33
SPI Module ......................................................................... 99
Framed SPI Support................................................. 100
Operating Function Description .................................. 99
Operation During CPU Idle Mode............................. 101
Operation During CPU Sleep Mode.......................... 101
SDOx Disable ............................................................. 99
Slave Select Synchronization................................... 101
SPI1 Register Map.................................................... 102
Timing Requirements
Master Mode (CKE = 0).................................... 196
Master Mode (CKE = 1).................................... 197
Slave Mode (CKE = 0)...................................... 198
Slave Mode (CKE = 1)...................................... 200
Word and Byte Communication.................................. 99
Status Bits, Their Significance and the Initialization Condition
for RCON Register, Case 1 ...................................... 154
Status Bits, Their Significance and the Initialization Condition
for RCON Register, Case 2 ...................................... 154
STATUS Register ............................................................... 16
Symbols Used in Opcode Descriptions ............................ 160
System Integration............................................................ 141
Register Map ............................................................ 158
T
Table Instruction Operation Summary................................ 43
Temperature and Voltage Specifications
AC............................................................................. 181
DC ............................................................................ 172
Timer1 Module.................................................................... 67
16-Bit Asynchronous Counter Mode........................... 67
16-Bit Synchronous Counter Mode............................. 67
16-Bit Timer Mode...................................................... 67
Gate Operation........................................................... 68
Interrupt ...................................................................... 68
Operation During Sleep Mode .................................... 68
Prescaler .................................................................... 68
Real-Time Clock ......................................................... 68
Interrupts ............................................................ 68
Oscillator Operation............................................ 68
Register Map .............................................................. 69
Timer2 and Timer3 Selection Mode.................................... 85
Timer2/3 Module................................................................. 71
16-Bit Timer Mode...................................................... 71
32-Bit Synchronous Counter Mode............................. 71
32-Bit Timer Mode...................................................... 71
ADC Event Trigger...................................................... 74
Gate Operation........................................................... 74
Interrupt ...................................................................... 74
Operation During Sleep Mode .................................... 74
Register Map .............................................................. 75
Timer Prescaler .......................................................... 74
Timer4/5 Module................................................................. 77
Register Map .............................................................. 79
Timing Diagrams
A/D Conversion
Low-Speed (ASAM = 0, SSRC = 000).............. 208
Band Gap Start-up Time........................................... 187
Brown-out Reset Characteristics .............................. 179
CAN Bit..................................................................... 116