Datasheet
dsPIC30F3014/4013
DS70138G-page 12 2010 Microchip Technology Inc.
FIGURE 1-2: dsPIC30F4013 BLOCK DIAGRAM
AN8/RB8
AN9/CSCK/RB9
AN10/CSDI/RB10
AN11/CSDO/RB11
Power-up
Timer
Oscillator
Start-up Timer
POR/BOR
Reset
Watchdog
Timer
Instruction
Decode &
Control
OSC1/CLKI
MCLR
V
DD
, V
SS
AN4/IC7/CN6/RB4
AN12/COFS/RB12
Low-Voltage
Detect
Timing
Generation
AN5/IC8/CN7/RB5
16
PCH PCL
Program Counter
ALU<16>
16
24
24
24
24
X Data Bus
IR
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
PCU
U2TX/CN18/RF5
EMUC3/SCK1/RF6
EMUD1/SOSCI/T2CK/U1ATX/
PORTB
C1RX/RF0
C1TX/RF1
U1RX/SDI1/SDA/RF2
EMUD3/U1TX/SDO1/SCL/RF3
PORTD
16
16
16
16 x 16
W Reg Array
Divide
Unit
Engine
DSP
Decode
ROM Latch
16
Y Data Bus
Effective Address
X RAGU
X WAGU
Y AGU
AN0/V
REF
+/CN2/RB0
AN1/V
REF
-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
OSC2/CLKO/RC15
U2RX/CN17/RF4
AV
DD
, AV
SS
16
16
16
16
16
PORTC
PORTF
16
16
16
16
8
Interrupt
Controller
PSV & Table
Data Access
Control Block
Stack
Control
Logic
Loop
Control
Logic
Data LatchData Latch
Y Data
(1 Kbyte)
RAM
X Data
(1 Kbyte)
RAM
Address
Latch
Address
Latch
Control Signals
to Various Blocks
EMUC2/OC1/RD0
EMUD2/OC2/RD1
OC3/RD2
OC4/RD3
IC1/INT1/RD8
IC2/INT2/RD9
16
Address Latch
Program Memory
(48 Kbytes)
Data Latch
Data EEPROM
(1 Kbyte)
16
CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/
CN0/RC14
PORTA
INT0/RA11
UART1,
I
2
C™
DCI
12-Bit ADC
Timers
Input
Capture
Module
Output
Compare
Module
UART2
SPI1
CAN1