Datasheet

2010 Microchip Technology Inc. DS70138G-page 11
dsPIC30F3014/4013
1.0 DEVICE OVERVIEW
This document contains specific information for the
dsPIC30F3014/4013 Digital Signal Controller (DSC)
devices. The dsPIC30F3014/4013 devices contain
extensive Digital Signal Processor (DSP) functionality
within a high-performance, 16-bit microcontroller
(MCU) architecture. Figure 1-1 and Figure 1-2 show
device block diagrams for dsPIC30F3014 and
dsPIC30F4013, respectively.
FIGURE 1-1: dsPIC30F3014 BLOCK DIAGRAM
Note: This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC Pro-
grammer’s Reference Manual”
(DS70157).
AN8/RB8
AN9/RB9
AN10/RB10
AN11/RB11
Power-up
Timer
Oscillator
Start-up Timer
POR/BOR
Reset
Watchdog
Timer
Instruction
Decode and
Control
OSC1/CLKI
MCLR
V
DD
, V
SS
AN4/CN6/RB4
AN12/RB12
Low-Voltage
Detect
UART1,
Timing
Generation
AN5/CN7/RB5
16
PCH PCL
Program Counter
ALU<16>
16
24
24
24
24
X Data Bus
IR
I
2
C™
Timers
PGC/EMUC/AN6/OCFA/RB6
PGD/EMUD/AN7/RB7
PCU
12-Bit ADC
U2TX/CN18/RF5
EMUC3/SCK1/RF6
Input
Capture
Module
Output
Compare
Module
EMUD1/SOSCI/T2CK/U1ATX/
PORTB
RF0
RF1
U1RX/SDI1/SDA/RF2
EMUD3/U1TX/SDO1/SCL/RF3
PORTD
16
16
16
16 x 16
W Reg Array
Divide
Unit
Engine
DSP
Decode
ROM Latch
16
Y Data Bus
Effective Address
X RAGU
X WAGU
Y AGU
AN0/V
REF
+/CN2/RB0
AN1/V
REF
-/CN3/RB1
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
OSC2/CLKO/RC15
U2RX/CN17/RF4
AV
DD
, AV
SS
UART2
16
16
16
16
16
PORTC
PORTF
16
16
16
16
8
Interrupt
Controller
PSV & Table
Data Access
Control Block
Stack
Control
Logic
Loop
Control
Logic
Data LatchData Latch
Y Data
(1 Kbyte)
RAM
X Data
(1 Kbyte)
RAM
Address
Latch
Address
Latch
Control Signals
to Various Blocks
EMUC2/OC1/RD0
EMUD2/OC2/RD1
RD2
RD3
IC1/INT1/RD8
IC2/INT2/RD9
16
SPI1
Address Latch
Program Memory
(24 Kbytes)
Data Latch
Data EEPROM
(1 Kbyte)
16
CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/
CN0/RC14
PORTA
INT0/RA11