Datasheet

dsPIC30F4011/4012

2.4.2.4 Data Space Write Saturation

In addition to adder/subtracter saturation, writes to data

space may also be saturated, but without affecting the

contents of the source accumulator. The data space write

saturation logic block accepts a 16-bit, 1.15 fractional

value from the round logic block as its input, together with

overflow status from the original source (accumulator)

and the 16-bit round adder. These are combined and

used to select the appropriate 1.15 fractional value as

output to write to data space memory.

If the SATDW bit in the CORCON register is set, data

(after rounding or truncation) is tested for overflow and

adjusted accordingly. For input data greater than

0x007FFF, data written to memory is forced to the max-

imum positive 1.15 value, 0x7FFF. For input data less

than 0xFF8000, data written to memory is forced to the

maximum negative 1.15 value, 0x8000. The MSb of the

source (bit 39) is used to determine the sign of the

operand being tested.

If the SATDW bit in the CORCON register is not set, the

input data is always passed through unmodified under

all conditions.

2.4.3 BARREL SHIFTER

The barrel shifter is capable of performing up to 16-bit

arithmetic or logic right shifts, or up to 16-bit left shifts

in a single cycle. The source can be either of the two

DSP accumulators or the X bus (to support multi-bit

shifts of register or memory data).

The shifter requires a signed binary value to determine

both the magnitude (number of bits) and direction of the

shift operation. A positive value shifts the operand right.

A negative value shifts the operand left. A value of ‘0’

does not modify the operand.

The barrel shifter is 40 bits wide, thereby obtaining a

40-bit result for DSP shift operations and a 16-bit result

for MCU shift operations. Data from the X bus is

presented to the barrel shifter between bit positions 16

to 31 for right shifts, and bit positions 0 to 15 for left

shifts.