Datasheet

dsPIC30F4011/4012
DS70135G-page 230 © 2010 Microchip Technology Inc.
Memory Map ............................................................... 30
Near Data Space ........................................................ 33
Software Stack............................................................ 33
Width........................................................................... 32
Data EEPROM Memory......................................................55
Erasing........................................................................ 56
Erasing, Block ............................................................. 56
Erasing, Word ............................................................. 56
Protection Against Spurious Write .............................. 58
Reading.......................................................................55
Write Verify ................................................................. 58
Writing......................................................................... 57
Writing, Block .............................................................. 58
Writing, Word .............................................................. 57
DC Characteristics ............................................................ 176
BOR ..........................................................................183
I/O Pin Input Specifications....................................... 181
I/O Pin Output Specifications .................................... 182
Idle Current (I
IDLE) .................................................... 179
Operating Current (I
DD)............................................. 178
Power-Down Current (I
PD) ........................................ 180
Program and EEPROM............................................. 183
DC Temperature and Voltage Specifications....................177
Dead-Time Generators ..................................................... 100
Ranges...................................................................... 101
Development Support .......................................................171
Device Configuration
Register Map............................................................. 162
Device Configuration Registers......................................... 160
FBORPOR ................................................................ 160
FGS...........................................................................160
FOSC ........................................................................ 160
FWDT........................................................................ 160
Divide Support..................................................................... 20
DSP Engine......................................................................... 20
Multiplier...................................................................... 22
dsPIC30F4011 Port Register Map ...................................... 61
dsPIC30F4012 Port Register Map ...................................... 62
Dual Output Compare Match Mode ....................................84
Continuous Output Pulse Mode .................................. 84
Single Output Pulse Mode .......................................... 84
E
Edge-Aligned PWM............................................................. 99
Electrical Characteristics...................................................175
Equations
A/D Conversion Clock............................................... 140
Baud Rate ................................................................. 123
I2CBRG Value .......................................................... 116
PWM Period................................................................98
PWM Period (Center-Aligned Mode) .......................... 98
PWM Resolution ......................................................... 98
Time Quantum for Clock Generation ........................ 133
Errata ....................................................................................8
External Interrupt Requests ................................................47
F
Fast Context Saving............................................................ 47
Flash Program Memory....................................................... 49
In-Circuit Serial Programming (ICSP) ......................... 49
Run-Time Self-Programming (RTSP) ......................... 49
Table Instruction Operation Summary ........................ 49
I
I/O Ports
Parallel I/O (PIO) ........................................................ 59
I
2
C Module
10-bit Slave Mode Operation.................................... 113
Reception ......................................................... 114
Transmission .................................................... 114
7-bit Slave Mode Operation...................................... 113
Reception ......................................................... 113
Transmission .................................................... 113
Addresses................................................................. 113
Automatic Clock Stretch ........................................... 114
During 10-bit Addressing (STREN = 1) ............ 114
During 7-bit Addressing (STREN = 1) .............. 114
Reception ......................................................... 114
Transmission .................................................... 114
General Call Address Support.................................. 115
Interrupts .................................................................. 115
IPMI Support............................................................. 115
Master Operation...................................................... 115
Baud Rate Generator (BRG) ............................ 116
Clock Operation................................................ 116
Multi-Master Communication,
Bus Collision and Arbitration .................... 116
Reception ......................................................... 116
Transmission .................................................... 115
Master Support ......................................................... 115
Operating Function Description ................................ 111
Operation During CPU Sleep and Idle Modes.......... 116
Pin Configuration ...................................................... 111
Programmer’s Model ................................................ 111
Register Map ............................................................ 117
Registers .................................................................. 111
Slope Control............................................................ 115
Software Controlled Clock Stretching (STREN = 1) . 114
Various Modes.......................................................... 111
In-Circuit Serial Programming (ICSP)............................... 149
Independent PWM Output ................................................ 102
Initialization Condition for RCON Register, Case 1 .......... 158
Initialization Condition for RCON Register, Case 2 .......... 158
Input Capture Module ......................................................... 79
In CPU Idle Mode ....................................................... 80
In CPU Sleep Mode.................................................... 80
Interrupts .................................................................... 81
Register Map .............................................................. 82
Simple Capture Event Mode....................................... 80
Input Change Notification Module....................................... 63
Register Map (bits 7-0) ............................................... 63
Input Diagrams
QEA/QEB Input ........................................................ 199
Instruction Addressing Modes ............................................ 37
File Register Instructions ............................................ 37
Fundamental Modes Supported ................................. 37
MAC Instructions ........................................................ 38
MCU Instructions ........................................................ 37
Move and Accumulator Instructions............................ 38
Other Instructions ....................................................... 38
Instruction Set Summary .................................................. 163
Internal Clock Timing Examples ....................................... 187
Internet Address ............................................................... 235
Interrupt Controller
Register Map .............................................................. 48
Interrupt Priority .................................................................. 44
Interrupt Sequence ............................................................. 47
Interrupt Stack Frame................................................. 47