Datasheet

© 2010 Microchip Technology Inc. DS70135G-page 189
dsPIC30F4011/4012
TABLE 24-16: INTERNAL CLOCK TIMING EXAMPLES
Clock
Oscillator
Mode
F
OSC
(MHz)
(1)
TCY (μsec)
(2)
MIPS
w/o PLL
(3)
MIPS
w/PLL x4
(3)
MIPS
w/PLL x8
(3)
MIPS
w/PLL x16
(3)
EC 0.200 20.0 0.05 — — —
4 1.0 1.0 4.0 8.0 16.0
10 0.4 2.5 10.0 20.0 —
25 0.16 6.25 — — —
XT 4 1.0 1.0 4.0 8.0 16.0
10 0.4 2.5 10.0 20.0 —
Note 1: Assumption: Oscillator postscaler is divide by 1.
2: Instruction Execution Cycle Time: T
CY = 1/MIPS.
3: Instruction Execution Frequency: MIPS = (F
OSC * PLLx)/4, since there are 4 Q clocks per instruction cycle.