Datasheet

dsPIC30F3014/4013
DS70138G-page 112  2010 Microchip Technology Inc.
FIGURE 17-1: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
Acceptance Filter
RXF2
(2)
R
(2)
X
B
1
A
c
c
e
p
t
A
c
c
e
p
t
Identifier
Data Field Data Field
Identifier
Acceptance Mask
RXM1
(2)
Acceptance Filter
RXF3
(2)
Acceptance Filter
RXF4
(2)
Acceptance Filter
RXF5
(2)
M
A
B
Acceptance Mask
RXM0
(2)
Acceptance Filter
RXF0
(2)
Acceptance Filter
RXF1
(2)
R
(2)
X
B
0
TXREQ
TXB2
(2)
TXABT TXLARB TXERR
MESSAGE
Message
Queue
Control
Transmit Byte Sequencer
TXREQ
TXB1
(2)
TXABT TXLARB TXERR
MESSAGE
TXREQ
TXB0
(2)
TXABT TXLARB TXERR
MESSAGE
Receive ShiftTransmit Shift
Receive
Error
Transmit
Error
Protocol
RERRCNT
TERRCNT
Err Pas
Bus Off
Finite
State
Machine
Counter
Counter
Transmit
Logic
Bit
Timing
Logic
CiTX
(1)
CiRX
(1)
Bit Timing
Generator
PROTOCOL
ENGINE
BUFFERS
CRC Check
CRC Generator
Note 1: i = 1 or 2 refers to a particular CAN module (CAN1 or CAN2).
2: These are conceptual groups of registers, not SFR names by themselves.