Datasheet

dsPIC30F1010/202X
DS70178C-page 66 Preliminary © 2006 Microchip Technology Inc.
REGISTER 5-12: IPC3: INTERRUPT PRIORITY CONTROL REGISTER 3
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
— — — — —MI2CIP<2:0>
bit 15 bit 8
U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-1 R/W-0 R/W-0
—SI2CIP<2:0>— NVMIP<2:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0’
bit 10-8 MI2CIP<2:0>: I
2
C Master Events Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 7 Unimplemented: Read as ‘0’
bit 6-4 SI2CIP<2:0>: I
2
C Slave Events Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
bit 3 Unimplemented: Read as ‘0’
bit 2-0 NVMIP<2:0>: Nonvolatile Memory Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled