Datasheet

© 2006 Microchip Technology Inc. Preliminary DS70178C-page 275
dsPIC30F1010/202X
APPENDIX A: REVISION HISTORY
Revision A (June 2006)
• Initial release of this document.
Revision B (August 2006)
This revision includes:
Updated Section 5.0 “Interrupts” to include
INTTREG register.
Updated device configuration registers to include FBS
Boot Code Segment and FOSCEL Oscillator Selection
configuration registers (see Section 18.10 “Device
Configuration Registers”).
Updated Electrical Characteristics:
•I
IDLE Parameter DC43f Max Value revised to
87 ma (see Table 21-6)
Typographical corrections:
•
dsPIC30F1010/2020 Port Registers (see Table 6-1)
- TRISA SFR bit 9 corrected to “TRISA9”
- TRISD SFR Reset State corrected to
“0000 0000 0000 0011”
• dsPIC30F2023 Port Registers (see Table 6-2)
- TRISA SFR bit 0 corrected to “unused”
- PORTA SFR bit 0 corrected to “unused”
- LATA SFR bit 0 corrected to “unused”
- TRISD SFR bit 0 corrected to “TRISD0”
- PORTD SFR bit 0 corrected to “RD0”
- LATD SFR bit 0 corrected to “LATD0”
- TRISD SFR reset state corrected to
“0000 0000 0000 0011”
• dsPIC30F1010/202X CNEN1 SFR reset state
corrected to “0000 0000 0000 0000“
(see Table 6-3)
• PWMCONx (see Register 12-5)
- Bit 13 description corrected to “TRGSTAT”
- Bit 10 description corrected to “TRGIEN”
• ALTDTRx (see Register 12-9)
- Bits 15-14 corrected to “unused”
• ADCPC1 (see Register 16-6)
- TRGSRC2<4:0> corrected to include bit 4
Revision C (November 2006)
This revision includes:
Updated RC, EC and HS Crystal operating frequencies
for Industrial and Extended Temperatures.
Revised SPI section to reflect updated operating fre-
quencies (see Section 13.0 “Serial Peripheral Inter-
face (SPI)”).
Revised oscillator configurations (see Section 18.3
“Oscillator Configurations”).
Updated Electrial Characteristics:
• Supply voltage parameter DC11 minimum value
changed to 3.0V (see Table 21-4)
• Operating current (I
DD) (see Table 21-5)
• Idle current (IIDLE) (see Table 21-6)
• I/O Pin Input specifications (see Table 21-8)
• I/O Pin Output specifications (see Table 21-9)
• External Clock Timing (see Figure 21-2 and
Table 21-12)
• PLL Clock Timing (see Table 21-13)
• Internal RC Accuracy (see Table 21-15)
• Power-up Timer Period (see Table 21-18)