Datasheet

dsPIC30F1010/202X
DS70178C-page 170 Preliminary © 2006 Microchip Technology Inc.
FIGURE 16-1: ADC BLOCK DIAGRAM
AVSS
AVDD
Data
Bus Interface
MUX/Sample/Sequence
Control
Format
DAC
12-word, 16-bit
Registers
Comparator
10-Bit SAR
Conversion Logic
AN0
AN2
AN6
AN1
AN11
AN3
AN8
AN10
Even numbered inputs
without dedicated
Dedicated Sample & Holds
AN4
Common Sample and Hold
Sample and Hold