Datasheet
© 2006 Microchip Technology Inc. Preliminary DS70178C-page 109
dsPIC30F1010/202X
FIGURE 12-2: PARTITIONED OUTPUT PAIR, COMPLEMENTARY PWM MODE
12.3 Control Registers
The following registers control the operation of the
Power Supply PWM Module.
• PTCON: PWM Time Base Control Register
• PTPER: Primary Time Base Register
• SEVTCMP: PWM Special Event Compare Regis-
ter
• MDC: PWM Master Duty Cycle Register
• PWMCONx: PWM Control Register
• PDCx: PWM Generator Duty Cycle Register
• PHASEx: PWM Phase-Shift Register
(PWM Period Register when module is
configured for individual period mode)
• DTRx: PWM Dead-Time Register
• ALTDTRx: PWM Alternate Dead-Time Register
• TRGCONx: PWM TRIGGER Control Register
• IOCONx: PWM I/O Control Register
• FCLCONx: PWM Fault Current-Limit Control
Register
• TRIGx: PWM Trigger Compare Value Register
• LEBCONx: Leading Edge Blanking Control Register
PWM Duty Cycle Register
Duty Cycle Comparator
Fault Override Values
Channel override values
Fault Pin Assignment Logic
Fault Pin
PWMXH
PWMXL
TMR < PDC
PWM
Override
Logic
Dead
Time
Logic
Fault Active
Phase Offset
M
U
X
M
U
X
Timer/Counter