Datasheet
© 2010 Microchip Technology Inc. DS70139G-page 103
dsPIC30F2011/2012/3012/3013
TABLE 14-2: I
2
C REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
I2CRCV 0200
— — — — — — — — Receive Register 0000 0000 0000 0000
I2CTRN 0202
— — — — — — — — Transmit Register 0000 0000 1111 1111
I2CBRG 0204
— — — — — — — Baud Rate Generator 0000 0000 0000 0000
I2CCON 0206 I2CEN
— I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN 0001 0000 0000 0000
I2CSTAT 0208 ACKSTAT TRSTAT
— — — BCL GCSTAT ADD10 IWCOL I2COV D_A P S R_W RBF TBF 0000 0000 0000 0000
I2CADD 020A
— — — — — — Address Register 0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.