Datasheet

dsPIC30F2010
DS70118J-page 84 © 2011 Microchip Technology Inc.
14.1.4 DOUBLE UPDATE MODE
In the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR regis-
ter is equal to zero, as well as each time a period match
occurs. The postscaler selection bits have no effect in
this mode of the timer.
The Double Update mode provides two additional func-
tions to the user. First, the control loop bandwidth is
doubled because the PWM duty cycles can be
updated, twice per period. Second, asymmetrical cen-
ter-aligned PWM waveforms can be generated, which
are useful for minimizing output waveform distortion in
certain motor control applications.
14.1.5 PWM TIME BASE PRESCALER
The input clock to PTMR (FOSC/4), has prescaler
options of 1:1, 1:4, 1:16 or 1:64, selected by control bits
PTCKPS<1:0> in the PTCON SFR. The prescaler
counter is cleared when any of the following occurs:
a write to the PTMR register
a write to the PTCON register
any device Reset
The PTMR register is not cleared when PTCON is
written.
14.1.6 PWM TIME BASE POSTSCALER
The match output of PTMR can optionally be post-
scaled through a 4-bit postscaler (which gives a 1:1 to
1:16 scaling).
The postscaler counter is cleared when any of the
following occurs:
a write to the PTMR register
a write to the PTCON register
any device Reset
The PTMR register is not cleared when PTCON is
written.
14.2 PWM Period
PTPER is a 15-bit register and is used to set the count-
ing period for the PWM time base. PTPER is a double-
buffered register. The PTPER buffer contents are
loaded into the PTPER register at the following
instances:
Free Running and Single Shot modes
: When the
PTMR register is reset to zero after a match with
the PTPER register.
Up/Down Counting modes
: When the PTMR
register is zero.
The value held in the PTPER buffer is automatically
loaded into the PTPER register when the PWM time
base is disabled (PTEN = 0).
The PWM period can be determined using
Equation 14-1:
EQUATION 14-1: PWM PERIOD
If the PWM time base is configured for one of the Up/
Down Count modes, the PWM period is found using
Equation 14-2.
EQUATION 14-2: PWM PERIOD (UP/DOWN
COUNT MODE)
The maximum resolution (in bits) for a given device
oscillator and PWM frequency can be determined using
Equation 14-3:
EQUATION 14-3: PWM RESOLUTION
Note: Programming a value of 0x0001 in the
period register could generate a continu-
ous interrupt pulse, and hence, must be
avoided.