Datasheet

dsPIC30F2010
DS70118J-page 196 © 2011 Microchip Technology Inc.
Enable Bits.................................................................. 88
Fault States................................................................. 88
Modes ......................................................................... 88
Cycle-by-Cycle.................................................... 88
Latched ............................................................... 88
PWM Operation During CPU Idle Mode.............................. 89
PWM Operation During CPU Sleep Mode .......................... 89
PWM Output and Polarity Control ....................................... 88
Output Pin Control ...................................................... 88
PWM Output Override......................................................... 87
Complementary Output Mode..................................... 87
Synchronization .......................................................... 87
PWM Period........................................................................ 84
PWM Special Event Trigger................................................89
Postscaler ...................................................................89
PWM Time Base ................................................................. 83
Continuous Up/Down Counting Modes....................... 83
Double Update Mode .................................................. 84
Free Running Mode .................................................... 83
Postscaler ...................................................................84
Prescaler..................................................................... 84
Single-Shot Mode ....................................................... 83
PWM Update Lockout .........................................................88
Q
QEA/QEB Input Characteristics ........................................ 169
QEI Module
External Clock Timing Requirements........................165
Index Pulse Timing Characteristics........................... 170
Index Pulse Timing Requirements ............................ 170
Operation During CPU Idle Mode ...............................78
Operation During CPU Sleep Mode............................ 77
Register Map............................................................... 79
Timer Operation During CPU Idle Mode ..................... 78
Timer Operation During CPU Sleep Mode..................77
Quadrature Decoder Timing Requirements ...................... 169
Quadrature Encoder Interface (QEI) Module ...................... 75
Quadrature Encoder Interface Interrupts ............................78
Quadrature Encoder Interface Logic...................................76
R
Reader Response ............................................................. 200
Reset......................................................................... 121, 127
Reset Sequence..................................................................39
Reset Sources ............................................................ 39
Reset Timing Characteristics ............................................161
Reset Timing Requirements.............................................. 161
Resets
BOR, Programmable................................................. 129
POR ..........................................................................127
Operating without FSCM and PWRT ................129
POR with Long Crystal Start-up Time....................... 129
RTSP Operation.................................................................. 44
S
Serial Peripheral Interface. See SPI
Simple Capture Event Mode
Capture Buffer Operation............................................ 68
Capture Prescaler ....................................................... 68
Hall Sensor Mode ....................................................... 68
Input Capture in CPU Idle Mode ................................. 69
Timer2 and Timer3 Selection Mode............................ 68
Simple OC/PWM Mode Timing Requirements.................. 167
Simple Output Compare Match Mode................................. 72
Simple PWM Mode............................................................. 72
Input Pin Fault Protection ........................................... 72
Period ......................................................................... 73
Single Pulse PWM Operation ............................................. 87
Software Simulator (MPLAB SIM) .................................... 145
Software Stack Pointer, Frame Pointer .............................. 12
CALL Stack Frame ..................................................... 27
SPI...................................................................................... 91
SPI Mode
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
SPI Module ......................................................................... 91
Framed SPI Support................................................... 92
Operating Function Description .................................. 91
SDOx Disable ............................................................. 91
Timing Characteristics
Master Mode (CKE = 0).................................... 171
Master Mode (CKE = 1).................................... 172
Slave Mode (CKE = 1).............................. 173, 174
Timing Requirements
Master Mode (CKE = 0).................................... 171
Master Mode (CKE = 1).................................... 172
Slave Mode (CKE = 0)...................................... 173
Slave Mode (CKE = 1)...................................... 175
Word and Byte Communication.................................. 91
SPI Operation During CPU Idle Mode ................................ 93
SPI Operation During CPU Sleep Mode............................. 93
STATUS Register ............................................................... 12
Subtracter ........................................................................... 16
Data Space Write Saturation ...................................... 18
Overflow and Saturation ............................................. 16
Round Logic ............................................................... 17
Write Back .................................................................. 17
Symbols used in Opcode Descriptions............................. 136
System Integration............................................................ 121
Overview................................................................... 121
Register Map ............................................................ 133
T
Temperature and Voltage Specifications
AC............................................................................. 156
DC ............................................................................ 148
Timer1 Module.................................................................... 57
16-bit Asynchronous Counter Mode ........................... 57
16-bit Synchronous Counter Mode............................. 57
16-bit Timer Mode....................................................... 57
Gate Operation ........................................................... 58
Interrupt ...................................................................... 59
Operation During Sleep Mode .................................... 58
Prescaler .................................................................... 58
Real-Time Clock ......................................................... 59
RTC Interrupts.................................................... 59
RTC Oscillator Operation ................................... 59
Register Map .............................................................. 60
Timer2 and Timer3 Selection Mode.................................... 72
Timer2/3 Module................................................................. 61
32-bit Synchronous Counter Mode............................. 61
32-bit Timer Mode....................................................... 61
ADC Event Trigger...................................................... 64
Gate Operation ........................................................... 64
Interrupt ...................................................................... 64
Operation During Sleep Mode .................................... 64
Register Map .............................................................. 65
Timer Prescaler .......................................................... 64