Datasheet

© 2011 Microchip Technology Inc. DS70118J-page 193
dsPIC30F2010
INDEX
Numerics
10-bit High Speed A/D
A/D Acquisition Requirements .................................. 117
Aborting a Conversion .............................................. 113
ADCHS ..................................................................... 111
ADCON1................................................................... 111
ADCON2................................................................... 111
ADCON3................................................................... 111
ADCSSL.................................................................... 111
ADPCFG................................................................... 111
Configuring Analog Port Pins.................................... 119
Connection Considerations....................................... 119
Conversion Operation............................................... 112
Effects of a Reset...................................................... 118
Operation During CPU Idle Mode ............................. 118
Operation During CPU Sleep Mode.......................... 118
Output Formats......................................................... 118
Power-Down Modes.................................................. 118
Programming the Start of Conversion Trigger .......... 113
Register Map............................................................. 120
Result Buffer ............................................................. 112
Sampling Requirements............................................ 117
Selecting the Conversion Sequence......................... 112
10-bit High Speed Analog-to-Digital Converter. See A/D
16-bit Up/Down Position Counter Mode.............................. 76
Count Direction Status................................................ 76
Error Checking............................................................ 76
A
A/D .................................................................................... 111
1 Msps Configuration Guideline................................ 116
600 ksps Configuration Guideline ............................. 116
750 ksps Configuration Guideline ............................. 116
Conversion Rate Parameters.................................... 115
Conversion Speeds................................................... 114
Selecting the Conversion Clock................................ 113
Voltage Reference Schematic .................................. 114
AC Characteristics ............................................................ 156
Load Conditions........................................................ 156
AC Temperature and Voltage Specifications .................... 156
Address Generator Units .................................................... 31
Alternate 16-bit Timer/Counter............................................ 77
Alternate Vector Table ........................................................ 41
Assembler
MPASM Assembler................................................... 144
Automatic Clock Stretch...................................................... 98
During 10-bit Addressing (STREN = 1)....................... 98
During 7-bit Addressing (STREN = 1)......................... 98
Receive Mode............................................................. 98
Transmit Mode............................................................ 98
B
Band Gap Start-up Time
Requirements............................................................ 162
Timing Characteristics .............................................. 162
Barrel Shifter ....................................................................... 18
Bit-Reversed Addressing .................................................... 35
Example...................................................................... 35
Implementation ........................................................... 35
Modifier Values (Table)............................................... 36
Sequence Table (16-Entry)......................................... 36
Block Diagram
PWM ........................................................................... 82
Block Diagrams
10-bit High Speed ADC Functional........................... 111
16-bit Timer1 Module.................................................. 58
DSP Engine................................................................ 15
dsPIC30F2010.............................................................. 8
External Power-on Reset Circuit .............................. 129
I
2
C .............................................................................. 96
Input Capture Mode.................................................... 67
Oscillator System...................................................... 123
Output Compare Mode............................................... 71
Quadrature Encoder Interface .................................... 75
Reset System ........................................................... 127
Shared Port Structure................................................. 53
SPI.............................................................................. 92
SPI Master/Slave Connection..................................... 92
UART Receiver......................................................... 104
UART Transmitter..................................................... 103
BOR Characteristics ......................................................... 155
BOR. See Brown-out Reset
Brown-out Reset
Characteristics.......................................................... 154
Timing Requirements ............................................... 161
Brown-out Reset (BOR).................................................... 121
C
C Compilers
MPLAB C18.............................................................. 144
Center-Aligned PWM.......................................................... 85
CLKO and I/O Timing
Characteristics.......................................................... 160
Requirements ........................................................... 160
Code Examples
Data EEPROM Block Erase ....................................... 50
Data EEPROM Block Write ........................................ 52
Data EEPROM Read.................................................. 49
Data EEPROM Word Erase ....................................... 50
Data EEPROM Word Write ........................................ 51
Erasing a Row of Program Memory ........................... 45
Initiating a Programming Sequence ........................... 46
Loading Write Latches................................................ 46
Code Protection................................................................ 121
Complementary PWM Operation........................................ 86
Configuring Analog Port Pins.............................................. 54
Control Registers................................................................ 44
NVMADR.................................................................... 44
NVMADRU ................................................................. 44
NVMCON.................................................................... 44
NVMKEY .................................................................... 44
Core Architecture
Overview..................................................................... 11
Core Register Map.............................................................. 28
Customer Change Notification Service............................. 199
Customer Notification Service .......................................... 199
Customer Support............................................................. 199
D
Data Access from Program Memory
Using Program Space Visibility .................................. 22
Data Accumulators and Adder................................ 16, 17, 18
Data Address Space........................................................... 23
Access RAM............................................................... 27
Alignment.................................................................... 26
Alignment (Figure)...................................................... 26
MCU and DSP (MAC Class) Instructions ................... 25
Memory Map......................................................... 23, 24
Spaces........................................................................ 26