Datasheet
© 2011 Microchip Technology Inc. DS70118J-page 109
dsPIC30F2010
TABLE 17-1: UART1 REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
U1MODE 020C UARTEN
—USIDL— —ALTIO— — WAKE LPBACK ABAUD — — PDSEL1 PDSEL0 STSEL
0000 0000 0000 0000
U1STA 020E UTXISEL
— — — UTXBRK UTXEN UTXBF TRMT URXISEL1 URXISEL0 ADDEN RIDLE PERR FERR OERR URXDA
0000 0001 0001 0000
U1TXREG 0210
— — — — — — — UTX8 Transmit Register
0000 000u uuuu uuuu
U1RXREG 0212
— — — — — — — URX8 Receive Register
0000 0000 0000 0000
U1BRG 0214 Baud Rate Generator Prescaler
0000 0000 0000 0000
Legend: u = uninitialized bit; — = unimplemented bit, read as ‘0’
Note: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.