Datasheet
PIC24FJ128GC010 FAMILY
DS30009312B-page 404 2012-2013 Microchip Technology Inc.
REGISTER 34-3: CW3: FLASH CONFIGURATION WORD 3
U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1
— — — — — — — —
bit 23 bit 16
R/PO-1 R/PO-1 R/PO-1 R/PO-1 r-1 R/PO-1 R/PO-1 R/PO-1
WPEND WPCFG WPDIS BOREN r WDTWIN1 WDTWIN0 SOSCSEL
bit 15 bit 8
r-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1
r WPFP6
(3)
WPFP5 WPFP4 WPFP3 WPFP2 WPFP1 WPFP0
bit 7 bit 0
Legend: PO = Program Once bit r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 23-16 Unimplemented: Read as ‘1’
bit 15 WPEND: Segment Write Protection End Page Select bit
1 = Protected program memory segment upper boundary is at the last page of program memory; the
lower boundary is the code page specified by WPFP<6:0>
0 = Protected program memory segment lower boundary is at the bottom of the program memory
(000000h); upper boundary is the code page specified by WPFP<6:0>
bit 14 WPCFG: Configuration Word Code Page Write Protection Select bit
1 = Last page (at the top of program memory) and Flash Configuration Words are not write-protected
(1)
0 = Last page and Flash Configuration Words are write-protected provided WPDIS = 0
bit 13 WPDIS: Segment Write Protection Disable bit
1 = Segmented program memory write protection is disabled
0 = Segmented program memory write protection is enabled; protected segment is defined by the
WPEND, WPCFG and WPFPx Configuration bits
bit 12 BOREN: Brown-out Reset Enable bit
1 = BOR is enabled (all modes except Deep Sleep)
0 = BOR is disabled
bit 11 Reserved: Always maintain as ‘1’
bit 10-9 WDTWIN<1:0>: Watchdog Timer Window Width Select bits
11 =25%
10 =37.5%
01 =50%
00 =75%
bit 8 SOSCSEL: SOSC Selection bit
1 = SOSC circuit is selected
0 = Digital (SCLKI) mode
(2)
bit 7 Reserved: Always maintain as ‘1’
Note 1: Regardless of WPCFG status, if WPEND = 1 or if WPFP<6:0> bits correspond to the Configuration Word
page, the Configuration Word page is protected.
2: Ensure that the SCLKI pin is made a digital input while using this configuration (see Tabl e 11-1).
3: For the 64K devices (PIC24FJ64GC0XX), maintain WPFP6 as ‘0’.