Datasheet
PIC24FJ128GC010 FAMILY
DS30009312B-page 400 2012-2013 Microchip Technology Inc.
REGISTER 34-1: CW1: FLASH CONFIGURATION WORD 1
U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1
— — — — — — — —
bit 23 bit 16
r-x R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1
r JTAGEN GCP GWRP DEBUG LPCFG ICS1 ICS0
bit 15 bit 8
R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1 R/PO-1
FWDTEN1 FWDTEN0 WINDIS FWPSA WDTPS3 WDTPS2 WDTPS1 WDTPS0
bit 7 bit 0
Legend: r = Reserved bit PO = Program Once bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 23-16 Unimplemented: Read as ‘1’
bit 15 Reserved: The value is unknown; program as ‘0’
bit 14 JTAGEN: JTAG Port Enable bit
1 = JTAG port is enabled
0 = JTAG port is disabled
bit 13 GCP: General Segment Program Memory Code Protection bit
1 = Code protection is disabled
0 = Code protection is enabled for the entire program memory space
bit 12 GWRP: General Segment Code Flash Write Protection bit
1 = Writes to program memory are allowed
0 = Writes to program memory are not allowed
bit 11 DEBUG
: Background Debugger Enable bit
1 = Device resets into Operational mode
0 = Device resets into Debug mode
bit 10 LPCFG
: Low-Voltage/Retention Regulator Configuration bit
1 = Low-voltage/retention regulator is always disabled
0 = Low-power, low-voltage/retention regulator is enabled and controlled in firmware by the RETEN bit
bit 9-8 ICS<1:0>: Emulator Pin Placement Select bits
11 = Emulator functions are shared with PGEC1/PGED1
10 = Emulator functions are shared with PGEC2/PGED2
01 = Emulator functions are shared with PGEC3/PGED3
00 = Reserved; do not use
bit 7-6 FWDTEN<1:0>: Watchdog Timer Configuration bits
11 = WDT is always enabled; SWDTEN bit has no effect
10 = WDT is enabled and controlled in firmware by the SWDTEN bit
01 = WDT is enabled only in Run mode and disabled in Sleep modes; SWDTEN bit is disabled
00 = WDT is disabled; SWDTEN bit is disabled
bit 5 WINDIS: Windowed Watchdog Timer Disable bit
1 = Standard Watchdog Timer is enabled
0 = Windowed Watchdog Timer is enabled (FWDTEN<1:0> must not be ‘00’)