Datasheet

 2012-2013 Microchip Technology Inc. DS30009312B-page 375
PIC24FJ128GC010 FAMILY
28.0 10-BIT DIGITAL-TO-ANALOG
CONVERTER (DAC)
PIC24FJ128GC010 family devices include two 10-bit
Digital-to-Analog Converters (DACs) for generating
analog outputs from digital data. A simplified block
diagram for a single DAC is shown in Figure 28-1. Both
of the DACs are identical.
The DAC generates an analog output voltage based on
the digital input code, according to the formula:
where V
DAC is the analog output voltage and VDACREF
is the reference voltage selected by DACREF<1:0>.
Each DAC includes these features:
• Precision 10-bit resistor ladder for high accuracy
• Fast settling time, supporting 1 Msps effective
sampling rates
• Buffered output voltage
• Three user-selectable voltage reference options
• Multiple conversion trigger options, plus a manual
convert-on-write option
• Left and right justified input data options
• User-selectable Sleep and Idle mode operation
When using the DAC, it is required to set the ANSx and
TRISx bits for the DACx output pin to configure it as an
analog output. See Section 11.2 “Configuring Analog
Port Pins (ANSx)” for more information.
FIGURE 28-1: SINGLE DAC SIMPLIFIED BLOCK DIAGRAM
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“10-Bit Digital-to-Analog Converter
(DAC)” (DS39615). The information in this
data sheet supersedes the information in
the FRM.
VDACREF  DACxDAT
1024
V
DAC =
Resistor
Ladder
AVss
CMPIF
INT1
TMR2 Trigger
TMR1 Trigger
Pipeline A/D Trigger
SD A/D Trigger
10
DACSEL<4:0>
Trigger and
Interrupt Logic
DACxIF
DVREF+
AV
DD
BGBUF0
DACREF<1:0>
DACx Output
DACEN
DACSIDL
Idle Mode
DACSLP
Sleep Mode
DACTRIG
10-Bit
2x Gain Buffer
Unity Gain
Buffer
Pin
DACxCON
DACxDAT