Datasheet

 2012-2013 Microchip Technology Inc. DS30009312B-page 369
PIC24FJ128GC010 FAMILY
27.0 16-BIT SIGMA-DELTA
ANALOG-TO-DIGITAL (A/D)
CONVERTER
The Sigma-Delta A/D Converter employs sigma-delta
modulation techniques to convert analog signals to a
digital equivalent. This method achieves exceptional
resolution and output code stability, which can signifi-
cantly exceed that of conventional 10-bit or 12-bit
SAR-based A/Ds. A block diagram of the 16-bit
Sigma-Delta A/D is shown in Figure 27-1.
Key features include:
• Adjustable sampling rates
• Configurable A/D data rates between
976 samples per second (highest quality) and
62.5 ksps (highest speed)
• Two differential input channels
• Programmable gain amplifier input
• User-selectable clock sources
• User-selectable oversampling, dithering and data
rounding
• Self-measurement of internal offset and gain error
• Operation in Idle and Sleep modes
• Independent module Reset option
FIGURE 27-1: SIGMA-DELTA A/D CONVERTER BLOCK DIAGRAM
Note: This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
“16-Bit Sigma-Delta A/D Converter”
(DS30687). The information in this data
sheet supersedes the information in the
FRM.
CH0+
SV
REF+/CH1+
CH1SE
SINC
3
–
+
PGA
Modulator
V
REF-
-
SDA1IF
SDxRESH
SDxRESL
Low-Pass
Primary OSC
FRC
F
CY
DITHER<1:0>
SDGAIN<2:0>
SDDIV<2:0>
SDCS<1:0>
V
REF+
FILTDIS
SDINT<1:0>
SDWM<1:0>
RNDRES<1:0>
SV
DD
SVREF+
SDREFP
VREF+
SVREF-/CH1-
SV
SS
CH0-
SVSS
SVREF-
Filter
V
REF-
SDREFN
SDCH<2:0>
Filter/Sample
Control and
Interrupt Logic
Clock
Generation